High Level Synthesis

Nikita Prabhu M.E. Microelectronics

Roll.No. 112109013

What is high level synthesis?

Synthesis task

Takes behavioral specification of the system Set of goals and constraints to be satisfies Finds structure to implement the above Constraints : limitations on cycle time, area, power, minimize cost.

Behavior

Way in which system and its components interact with environment Mapping inputs from output

System

Set of interconnected components which make up the system netlist

Algorithmic level/Behavioral synthesis

Primary data types : integers and/or bit strings and arrays, rather than Boolean variables. Input specification gives mappings from sequences of inputs to sequences of outputs. Constrain the internal structure of the system designed as little as possible. From that input specification, the synthesis system produces a description of a register-transfer level structure that realizes the specified behaviour. This structure includes a data path, that is, a network of registers, functional units, multiplexer and buses, as well as hardware to control the data transfers in that network. If the control is not integrated into the data path the synthesis system must also produce the specification of a finite state machine that drives the data paths so as to produce the required behaviour.

Why study high level synthesis?

Shorter design cycle

Automated design process Get design out the door faster Better chance of hitting market window Design development cost reduced

Fewer errors

For verified correct synthesis process New chips have fewer errors Lesser debugging

Ability to search design space

Several designs produced for same specification in reasonable time. Allows exploration of trade off between cost, speed, power, area etc.

Design process self-documenting

Automated system keeping track of design decisions made Reasons behind and effects of those decisions

Availability of IC technology to more people.

Simpler for non experts to produce a chip of required specification