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Outline
Software Xilinx 13.4 --Why Xilinx -- RTL Schematic -- Test Bench simulation
data
Introduction
Human computer interaction but still rural communities lag behind technologies.
One good solution for this problem would be computers talking to the common man in the language he is comfortable to communicate in.
Hardware Design
Features of Spartan-6
Xilinx Spartan-6 LX45 FPGA, 324-pin BGA package 128Mbyte DDR2 with 16-bit wide data 10/100/1000 Ethernet PHY on-board USB2 ports for programming and data transfer USB-UART and USB-HID port (for mouse/keyboard) two HDMI video input ports and two HDMI output ports AC-97 Codec with line-in, line-out, mic, and headphone real-time power monitors on all power rails 16Mbyte x4 SPI Flash for configuration and data storage 100MHz CMOS oscillator 48 I/Os routed to expansion connectors GPIO includes eight LEDs, six buttons, and eight slide switches
Power Supplies
The Atlys board requires an external 5V, 4A.
Atlys Power Supplies Supply Circuits FPGA I/O, video, USB ports, clocks, ROM, audio FPGA aux, VHDC, Ethernet PHY I/O, GPIO FPGA core, Ethernet PHY core DDR & FPGA DDR I/O DDR termination voltage (VTT) Device Amps (max/typ)
3.3 V
IC16: LT3501
3A / 900mA
Goals: Attach a keyboard to the Spartan 6 device through PS/2 type of port; Design a logic which can detect a character. Use VHDL during the development process.
Electrical interface
FPGA read PS2 Data_Out & PS2 Clk_out = 0 So tristate buffer= high impedance mode FPGA write Logic 0:PS2 Data_Out & PS2 Clk_out = 1 Which pulls line low Logic 1:PS2 Data_Out & PS2 Clk_out = 0 Which pulls line high
Clock Data
The keyboard sends packets of data, scan codes, to the host indicating which key has been pressed. When a key is pressed or held down a make code is transmitted. When a key is released a break code is transmitted. Every key is assigned a unique make and break code so that the host can determine exactly what has happened.
C
D E F G H I J K L M
21
23 24 2B 34 33 43 3B 42 4B 3A
F0,21
F0,23 F0,24 F0,2B F0,34 F0,33 F0,43 F0,3B F0,42 F0,4B F0,3A
P
Q R S T U V W X Y Z
4D
15 2D 1B 2C 3C 2A 1D 22 35 1A
F0,4D
F0,15 F0,2D F0,1B F0,2C F0,3C F0,2A F0,1D F0,22 F0,35 F0,1A
XILINX TARGETED DESIGN FORMAT ISE DESIGN SUITE SPARTAN-6 & VERTEX-6 FPGA FAMILIES XILINX IP CORE SOLUTION
RTL SCHEMATIC
Implementation
The hardware layout proposed earlier is implemented on a Xilinx
Spartan-6 LX45 FPGA. Both the FSM and hardware layout are synthesized using the Xilinx ISE 13.4 VHDL Compiler.
Conclusion
In this paper we discussed the issues relevant to the development of text to speech systems for Marathi language. The Atlys circuit board is a complete, ready-
References
Marathi Language Speech Synthesizer Using Concatenative Synthesis Strategy (Spoken in Maharashtra, India) 2010 IEEE; Atlys Board Reference Manual Thesis of FPGA-based implementation of concatenative speech synthesis algorithm by Praveen Kumar Bamini VHDL: Programming by Example Douglas L. Perry Fourth Edition McGraw-Hill E. Veera Raghavendra, Srinivas Desai, B. Yegnanarayana, Alan W Black, Kishore Prahallad, Experiments on Unit Size for Unit selection Speech Synthesis, Blizzard 2008. Jerneja Zganec Gros and Mario Zganec, An Efficient Unitselection Method for Concatenative Text-to-speech Synthesis Systems, Journal of Computing and Information Technology- CIT 16, 2008,1, 69-78 doi:10.2498/cit.1001049 Aniruddha Sen, Speech Synthesis in India, IETE Technical Review, Vol 24, No 5, Sep-Oct 2007, pp 343-350. S. P. Kawachale and J. S. Chitode, An Optimized Soft Cutting Approach to Derive Syllables from Words in Text to Speech Synthesizer, in proceedings Signal and Image Processing, 2006, pp 534. S. P. Kishore and A. W. Black, Unit size in Unit selection Speech Synthesis, Proceedings of EUROSPEECH, Geneva, Switzerland, 2003. P. Prathibha, A.G. Ramakrishna, R. Muralishankar, Thirukkural II- A text-to-Speech Synthesis System Edition, 2003 S. P. Kishore, Rohit Kumar, and Rajeev Sangal, A data driven synthesis approach for Indian Languages using syllable as basic unit, in Proceedings of International Conference on Listeners National Language Processing (ICON), 2002. Eric Lewis and Mark Tatham, Word and Syllable Concatenation in Text to Speech Synthesis, Proceedings of sixth European Conference of Speech Communication and Male E 77 23 Female F 84 16 Technology, pp615-618, ESCAs, 1999. T. Dutoit, An Introduction to Text-to-Speech Synthesis, Kluwer Academic Publishers, Dordrecht, 320 pp., ISBN 0-79230254498-7. 1997. Paul Taylor, Text-to-Speech Synthesis University of Cambridge
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