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I/O devices (Peripherals)

Examples: switches, LED, LCD, printers, keyboard, keypad Interface chips


are needed to resolve the speed problem synchronizes data transfer between CPU and I/O device

Connection of Interface and CPU


Data pins are connected to CPU data bus I/O port pins are connected to I/O device

CPU may be connected to multiple interface IO ports are simplest interface


hsabaghianb @ kashanu.ac.ir Microprocessors 6-2

I/O Interfacing
Dedicated instructions for IO operations (Isolated I/O) same instruction for memory and IO (memory-mapped I/O) MCS-51 (8051) is memory mapped

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-3

Synchronization of CPU and interface chip


To make sure that there are valid data in the interface two ways
Polling method: Read status bit - Simple method Interrupt driven method: interface interrupts the CPU when it has new data - CPU executes the ISR

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-4

Synchronization of CPU and interface chip


Output synchronization: two ways of doing this 1. Polling method
interface chip uses a status bit to indicate that the data register is empty CPU keeps checking status bit until it is set, and then writes data into interface chip

2. Interrupt driven method: interface chip interrupts the CPU when it data register is empty. CPU executes the ISR

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-5

Synchronization of CPU and interface chip


Methods used to synchronize data transfer between interface chip and I/O devices: 1. Brute force method: interface chip returns voltage levels in its input ports to CPU and makes data written by CPU directly available on its output ports 2. Strobe method:
All 8051 port can perform brute force I/O During input, the I/O device activates a strobe signal when data are stable. Interface chip latches the data For output, interface chip places output data on output port. when data is stable, it activates a strobe signal. I/O device latches the data One is asserted by interface chip and the other by I/O device

3. Handshake method: two handshake signals are needed

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-6

8051 - Switch On I/O Ports


Case-1:
Gives a logic 0 on switch close Current is 0.5ma on switch close

Case-2:
Gives a logic 1 on switch close High current on switch close

Case-3:
Can damage port if 0 is output

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-7

Simple input devices


DIP switches usually have 8 switches

Use the case-1 from previous page


Sequence of instructions to read is:
MOV MOV P1,#FFH A,P1,

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-8

Bouncing contacts
Contact:
Push-button switches Toggle switches Electromechanical relays

Make and break Contact normally open switch The effect is called "contact bounce" or, in a switch, "switch bounce.

If used as edge-triggered input (as INT0), several interrupt is accorded


hsabaghianb @ kashanu.ac.ir Microprocessors 6-9

Hardware Solution
An RC time constant to suppress the bounce The time constant has to be larger than the switch bounce
Vcc

OUT

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-10

Hardware Solution

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-11

Software Solution
Read the new state of switch N time Wait-and-see technique
When the input drops an appropriate delay is executed (10 ms) then the value of the line is checked again to make sure the line has stopped bouncing

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-12

Interfacing a Keypad
16 keys arranged as a 4X4 matrix
Place a 0 on R0 port Read C port If there is a 0 bit then the button at the column/row intersection has been pressed. Otherwise, try next row Repeat constantly
F
B 7 3

E
A 6 2

D
9 5 1

C 8 4 0
C1 C2 C3 C4 R1 R2 R3 R4

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-13

Interfacing a Keypad
scan: scan1: scan2: scan3: scan4: .. .. .. mov jnb jnb jnb jnb mov jnb P1,#EFH P1.0,db_0 P1.1,db_1 P1.2,db_2 P1.3,db_3 P1,#DFH P1.0,db_4

F B 7

E A 6

D 9 5

C 8 4
P1.7 P1.6 P1.5 P1.4

8051

0
P1.3 P1.2 P1.1 P1.0

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-14

Interfacing a Keypad
db_0: lcall jb mov ljmp lcall jb mov ljmp wt_10ms P1.0, scan1 A, #0 get_code wt_10ms P1.1, scan2 A, #1 get_code

db_1:

.. ..

get_code:

key_tab:

mov movc ljmp db END

DPTR, #key_tab A, @A+DPTR scan 0123456789ABCDEF

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-15

Simple output devices


Case-1
LED is ON if output=zero Most LEDs drop 1.7 volts and need about 10ma Current is (5-1.7)/470 Too much current Failure of Port or LED

Case-2
Case-3

Not enough drive (1ma) LED is too dim

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-16

The 7-Segment Display


7 LEDs arranged to form the number 8.
By turning on and off (LEDs), different combinations can be produced.
useful for displaying the digits 0 through 9, and some characters.
a f g e d c b

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-17

The 7-segment Display (Cont.)


7-segment displays come in 2 configurations:

Common Anode
Connect cathode to the output

Common Cathode
Connect cathode to the output

Therefore, the common anode variety would be better for our interfacing needs.
hsabaghianb @ kashanu.ac.ir Microprocessors 6-18

Interfacing a 7-segment display


A resistor will be needed to control the current This leaves two possibilities:

Case 2 would be more appropriate Case 1 will produce different brightness depending on the number of LEDs turned on.
hsabaghianb @ kashanu.ac.ir Microprocessors 6-19

Use of current buffer


Interfacing to a DIP switch and 7-segment display Output a 1 to ON a segment We can use 74244 to common cathode 7_seg

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-20

BCD to 7_Seg lookup table


BCD

get_code:

mov anl mov movc mov db db END

a,p3 a,0fh DPTR, #7s_tab A, @A+DPRT p1,a 3fh,30h,5bh,4fh,66h 6dh,7dh,07h,7fh,6fh

pgfedcba 7_seg 001111 11 00110000 0101101 1 010011 11 011001 10 01101101

he x 3f 30 5b 4f 66 6d

0000 0001 0010 0011 0100 0101

7s_tab:

0110
0111 1000 1001

01111101
00000111 01111111 01101111
a b f a g d b f a g d

7d
07 7f 6f
b

a f b f e e

a g d b

a g d b c f g b c f

a g f

a g

e
d

c
d

e
d

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-21

LCD Interfacing
Liquid Crystal Displays (LCDs)
cheap and easy way to display text Various configurations (1 line by 20 X char up to 8 lines X 80)

Integrated controller
The display has two register
command register data register

By RS you can select register

Data lines (DB7-DB0) used to transfer data and commands


hsabaghianb @ kashanu.ac.ir Microprocessors 6-22

Alphanumeric LCD Interfacing


Pinout
Microcontrolle r
E R/W RS DB7DB0 communications bus

8 data pins D7:D0 RS: Data or Command Register Select R/W: Read or Write E: Enable (Latch data)

8
LCD controller

RS Register Select R/W = 0 Write , E Enable D0 D7

RS = 0 Command Register RS = 1 Data Register

LCD Module

R/W = 1 Read

Used to latch the data present on the data pins.

Bi-directional data/command pins. Alphanumeric characters are sent in ASCII format.

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-23

LCD Commands
The LCDs internal controller can accept several commands and modify the display accordingly. Such as:
Clear screen Return home Decrement/Increment cursor

After writing to the LCD, it takes some time for it to complete its internal operations. During this time, it will not accept any new commands or data.
We need to insert time delay between any two commands or data sent to LCD
hsabaghianb @ kashanu.ac.ir Microprocessors 6-24

Pin Description

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-25

Command Codes

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-26

LCD Addressing

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-27

LCD Timing

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-28

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-29

Interfacing LCD with 8051


8051
LM015
P3.4 P3.5

RW E RS

P3.3

P1.7-P1.0

D7-D0

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-30

mov A, command call cmd delay mov A, another_cmd call cmd delay mov A, #A call data delay mov A, #B call data delay . Command and Data Write Routines data:mov P1, A ;A is ascii data setb P3.3 ;RS=1 data clr P3.4 ;RW=0 for write setb P3.5 ;H->L pulse on E clr P3.5 ret cmd:mov P1,A ;A has the cmd word clr P3.3 ;RS=0 for cmd clr P3.4 ;RW=0 for write setb P3.5 ;H->L pulse on E clr P3.5 ret
hsabaghianb @ kashanu.ac.ir

Interfacing LCD with 8051

Microprocessors 6-31

Example

hsabaghianb @ kashanu.ac.ir

Microprocessors 6-32

8255 memory mapped to 8051 at address C000H base Control word for all ports as outputs in mode0
CR : 1000 0000b = 80H
A = C000H, B = C001H, C = C002H, CR = C003H

8255 Usage: Simple Example

test:

mov mov movx mov

A, #80H DPTR, #C003H @DPTR, A A, #55h

repeat:mov DPTR,#C000H movx @DPTR, A inc DPTR movx @DPTR, A inc DPTR movx @DPTR, A cpl A acall MY_DELAY sjmp repeat
hsabaghianb @ kashanu.ac.ir

; ; ; ; ; ; ; ; ; ; ; ; ; ;

control word address of CR write control word will try to write 55 and AA alternatively address of PA write 55H to PA now DPTR points to PB write 55H to PB now DPTR points to PC write 55H to PC toggle A (55AA, AA55) small delay subroutine for (1)
Microprocessors 6-33

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