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Alpha Breathing

Alpha Breathing Breath in Breath out Hold

Breath in Breath out Hold

The SIC/XE machine architecture

  • Memory

    • The same as that previously described for SIC.

    • Maximum memory available on a SIC/XE system is

1MB.

  • Registers

The SIC/XE machine architecture  Memory  The same as that previously described for SIC. 

The SIC/XE machine architecture (cont.)

  • Data formats (48-bit floating point)

  • f*2^(e-1024)

  • Instruction formats and addressing modes

    • e=0 means Format 3 ; e=1 means Format 4

    • i=0, n=0 means SIC machine (for upward compatible)

    • i=1, n=0 means immediate addressing

    • i=0, n=1 means indirect addressing

    • i=1, n=1 means simple addressing

1: Background

The SIC/XE machine architecture (cont.)

  • Instruction set

    • SIC/XE provides all of the instructions that are available on the standard versions.

    • It also provides instructions to perform floating-point arithmetic operations (ADDF, SUBF, MULF, DIVF )

..

  • Register-to-register arithmetic operations (ADDR,

SUBR,…)

  • Input and Output

    • SIO (start I/O channel), TIO (test I/O channel) and HIO (halt I/O channel)

The SIC/XE programming examples

  • Data movement

The SIC/XE programming examples  Data movement 1: Background

Compared the SIC with SIC/XE

  • Data movement

Compared the SIC with SIC/XE  Data movement 1: Background

1: Background

9

The SIC/XE programming examples (cont.)

  • Arithmetic operations

The SIC/XE programming examples (cont.)  Arithmetic operations 1: Background

The SIC/XE programming examples (cont.)

 Looping and indexing operations MOVECH STR1 STR2
Looping and indexing operations
MOVECH
STR1
STR2

The SIC/XE programming examples (cont.)

  • Indexing and looping operations

The SIC/XE programming examples (cont.)  Indexing and looping operations 1: Background

The SIC/XE programming examples (cont.)

  • Subroutine call and record input operations

CISC vs. RISC

  • CISC: Complex Instruction Set Computers machine.

    • relatively large and complicated instruction set.

    • several different instruction formats and length

    • many different addressing modes.

  • E.g., VAX, Pentium…

  • The implementation of such an architecture in hardware tends to be complex.

  • The VAX architecture (CISC)

    • Introduced by Digital Equipment Corporation (DEC) in 1978.

    • Memory

    All addresses used are byte addresses.

    2 bytes forms a word, 4 bytes forms a longword

    8 bytes forms a quadword, 16 bytes forms a octaword

    • Registers

    16 general-purpose register. (R15: program counter,

    R14: stack pointer, R13: frame pointer, R12: argument

    pointer…)

    CISC vs. RISC

    • RISC: Reduced Instruction Set Computers machine

      • Standard, fixed instruction length

      • Single-cycle execution of most instructions

      • Relatively large number of general-purpose registers

      • Relatively small number of machine instructions

      • Relatively small number of instruction formats and addressing modes.

  • E.g., UltraSPARC, PowerPC, Cray T3E…

  • The implementation of such an architecture in hardware tends to be simple.

  • The UltraSPARC architecture (RISC)

    • Introduced by Sun Microsystem in 1995.

    • Memory

    All addresses used are byte addresses.

    2 bytes forms a halfword, 4 bytes forms a word

    • Registers

    A large register file (more than 100 general-purpose

    register)

    Fixed instruction length