CHAPTER 5

COMBINATIONAL LOGIC
WITH MSI AND LSI
LEADER: CASTRO, JENADY GENE G.
MEMBERS:
ALVARICO, MELLANIE R. RANAS,
RENZO T.
CAPISTRANO, KENNETH JOSHUA SECO,
ERIC G.
RAVILE, RNATO JR. ONGOSE,
WILMAR A.
SARMIENTO, ALEXANDRA U. LLONA,
MYRNALYN D.
BSI T-1A

TOPICS
Binary Parallel Adder
Magnitude Comparator
Encoder
Decoder
Multiplexers
Programmable ROMs
Programmable Array
BINARY
PARALLEL
ADDER
BINARY PARALLEL
ADDER
A Binary Parallel Adder is a digital
function that produces the arithmetic
function sum of two binary numbers in
parallel.
It consists of full-ladders connected in
cascade, with the output carry from one
full-ladder connected to the input carry
of the next full ladder.
BINARY PARALLEL
ADDER
Figure 5.1 shows the interconnection
of four full-adder (FA) circuits to
provide a 4-bit binary parallel adder.
The addend bits of A and the addend
bits of B are designated by subscript
numbers from right to left with
subscript 1 denoting the low-order bit.
FIGURE 5.1. 4-BIT FULL
ADDER
DECIMAL ADDER
A Decimal Adder requires a
minimum of nine inputs and five
outputs, since four bits are
required to code each decimal
digit and the circuit must have an
input carry and output carry.
BCD ADDER
A BCD Adder is a
circuit that adds two
BCD digits in parallel
and produces a sum digit
also in BCD.
FIGURE 5.2 BLOCK DIAGRAM OF A BCD
ADDER
MAGNITUDE
COMPARATO
R
MAGNITUDE COMPARATOR
A Magnitude Comparator is a combinational
circuit that compares two numbers, A and B,
and determines their relative magnitudes.
The outcome of the comparison is specified
by three binary variables that indicate whether
A>B, A=B or A<B.
An algorithm is a procedure that specifies a
finite steps which if followed, gives the
solution to a problem.
FIGURE 5.3 FOUR-BIT MAGNITUDE
COMPARATOR
ENCODER
ENCODER
An encoder converts an active input
signal into a coded output signal.
There are n input lines, only one of
which is active.
Internal logic within the encoder
converts this active input into a
coded binary output with m bits.
ENCODER
The type of encoder available in IC
form is called a priority encoder.
A priority encoder monitor several
lines and assigns each of them a
priority.
If one of the lines is activated, the
priority encoder produces an output
indicating which line it is.
DECIMAL-TO-BCD-ENCODER
A common type of encoder is the decimal-to-
BCD-encoder which is illustrated in Figure 5.4
The switches are push-button switches like those
of a pocket calculator.
When button 3 is pressed, the C and D OR gates
have high inputs; therefore, the output is:
ABCD= 0011
If button 6 is pressed, the output becomes:
ABCD= 0110.
FIGURE 5.4 DECIMAL-TO-BCD
ENCODER
DECIMAL-TO-BCD-ENCODER
Figure 5.5 (a) shows the pin
configuration for a 74147 and (b)
shows how to represent a 74147 by
means of a schematic diagram.
The bubbles indicate active-low inputs
and outputs.
The 74147 is called a priority encoder
because it gives priority to the highest
order input.
FIGURE 5.5 (a) PINOUT DIAGRAM OF
74147 (b) LOGIC DIAGRAM
DECODERS
DECODERS
o A digital decoder has 2N outputs and accepts
N inputs.
o Only the output that corresponds to the binary
number on the input lines is activated.
o Decoders are used in many digital circuits.
o They can be used to select memory addresses,
and to decode instructions in a computer.
o They are used whenever only one line from
several possible lines must be selected.

DECODERS
o A decoder is similar to a demultiplexer, with
one exception- there is no data input.
o The only inputs are the control bits ABC,
which are illustrated in Figure 5.6.
o The logic circuit is called a 1-of-8 decoder
because only 1 of the 8 output lines can be
high.
o Sometimes the circuit is called a binary-to-
decimal adder, because the identifying
subscript of the high output line is always
equal to the decimal value equivalent of the
ABC input.

SEVEN-SEGMENT
DECODERS
A light-emitting diode (LED) emits radiation
when forward biased because the LEDs free
electrons recombine with holes near the
junction.
A diode is said to be in a forward bias
condition when it the diode have a nominal
voltage of 0.7 V across its terminal when
conducting current.
Figure 5.7 shows a seven-segment indicator
with seven LEDs labeled a through g.
SEVEN-SEGMENT
DECODERS
Seven-segment indicators may be of the
common-cathode type in which all annodes are
connected together.
A seven-segment decoder-driver is an IC
decoder that can be used to drive a seven-
segment indicator.
There are two types of decoder drivers; one for
common-annode indicators and the other for
common-cathode indicators.
Figure 5.9 shows a 7446 driving a common-
annode indicator.
DECIMAL TO SEVEN-SEGMENT
CONNECTION
Figure 5.10 shows the block diagram for
displaying the 10 digits of the decimal number
system.
It consists of ten switches which corresponds
to count 0 to count 9.
This circuit functions in a way that, when a
particular switch is on, for instance if the
switch for count 0 is turned on, the decimal to
BCD circuitry will convert this to its
corresponding binary equivalent which is
0000.
MULTIPLEXE
RS
MULTIPLEXERS
Multiplex means many into one.
A multiplexer is a circuit with many inputs
but only one output.
The inputs to a multiplexer are represented
by the several input lines shown.
One of the input lines is connected to the
output.
The basic multiplexer operation is shown in
Figure 5.13.
THE 74151
MULTIPLEXERS
Multiplexers can be constructed out of
AND and OR gates, but there is no need
to do so.
Several multiplexers exist in the 7400
family.
One of these is the 74151 the pinout
program of which is given in Figure 5.14
It is an 8-to-1 multiplexer in a 16-pin
package.
Figure 5.15 shows the logic diagram of a
74151 IC.
NIBBLE
MULTIPLEXERS
When a binary number has 4 bits,
it is called a nibble.
Sometimes we want to select one
of two input nibbles.
In this case, we can use a nibble
multiplexer like the one shown in
Figure 5.16.
DEMULTIPLEXER
Demultiplex means one into many.
A demultiplex is a logic circuit with one
input and many outputs.
By applying control signals, we can
direct the input signal to one of the output
lines.
The demultiplexing principle is illustrated
in Figure 5.17, where it was assumed that
only one switch is closed at any one time.
PROGRAMMABL
E ROMs
PROGRAMMABLE
ROMs
A programmable ROM (PROM) allows the
user, instead of the manufacturer, to store the
data.
An instrument called a PROM programmer
stores the words by burning in.
Here are some commercially available
PROMs: 74S188- 256 bits organized
as 32 X 8
74S287- 1024 bits organized as 256 X
4
74S472- 4096 bits organized as 512 X
8
SIMPLIFIED DRAWING OF A
PROM
An alternate, streamlined drawing
procedure for PROMs like the one in
Figure 5.20 is shown in Figure 5.21.
In this simplified drawing, the solid black
bullets indicated connections to the AND
gates inputs.
Each bullet represents a fixed connection
that cannot be changed.
PROGRAMMING A
PROM
Generating a Boolean function
at the output of a PROM is
accomplished by fusing
(melting) fusible links along
the inputs to the OR gates in
Figure 5.21.
PROGRAMMABL
E LOGIC ARRAY
PROGRAMMABLE LOGIC
ARRAY
A Programmable Logic Array or PLA is
similar to a ROM in concept.
The difference, however, is that the PLA does
not provide full decoding of the variables and
does not generate all the minterms as in the
ROM.
A PLA having 3 input variables (ABC) and 3
output variables (XYZ) is illustrated in Figure
5.22
Eight AND gates are required to decode the 8
possible input states.