MAGNETO-RESISTIVE

ACCESS MEMORY
(MRAM)
Presented By:
J. Shravani
CSE-4/4,
Regd.No.:06521A0536

Guided By
Asst.Proff Mr.V.V.S.N.Sastry
Computer Science Dept.

It is a Non-Volatile Random Access Memory.
This technology is designed to initially replace
flash memory and, potentially, DRAM
memory.
MRAM uses magnetic, thin film elements on a
silicon substrate that can be built on the same
chip with the logic circuits.
The MRAM product, called MR2A16A .

The main weakness of flash memory is the
number of times that data can be written to it.
Data can be read from flash as many times as
desired, but after a certain number of "write"
operations, it will fail.
The erase command takes much longer than
the write process.
Flash Memory Chips are not made with the
ability to erase individual bits or bytes. Only
large sections of memory (usually 512 bytes or
more) can be erased at a time.
Information
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Input
Output
Information
transmission
Information
Processing
Information
storage
DRAM, MRAM

Magnetic (HDD)
Optical (CD, DVD)

Fast
Unlimited Cycles
Nonvolatile
Viable
MRAM requires less memory refreshes
More storage in the mobile devices
Retains data after a power supply is turned off


1989 - IBM scientists made a string of key discoveries about
the giant magneto-resistive effect" in thin-film structures.

2000 - IBM and Infineon established a joint MRAM
development program.

2003 - A 128 kbit MRAM chip was introduced

2004 -Renesas Technology Develops High-Speed, High-
Reliability MRAM Technology.

2005 - Renesas Technology and Grandis to Collaborate on
Development of 65 nm MRAM Employing Spin Torque Transfer.
Magnetic Random Access Memory
Cross point
architecture
Magnetic
memory
element
High resistance

Low resistance
topping
crust
integration
Si
circuitry
Integration of MRAM (pizza style)
Writing a bit in MRAM

This creates a local
magnetic field to
switch a memory cell at
the cross point
Send current
through metal word
and bit lines.
Reading a bit in MRAM
- Send current through element
- Measure its resistance (high or low)
But many parallel current paths
diode or transistor needed
Information is stored as magnetic polarization, not charge

The state of the bit is detected as a change in resistance
Magnetic layer 1 (free layer)
Magnetic layer 2 (fixed layer)
Tunnel barrier
Magnetic vectors are parallel
low resistance. 0
Magnetic vectors are anti-parallel
high resistance. 1
S
S N
N
N
S N
S
Target Application Battery
Backed SRAM Replacement
Primary Usage
Data Logging
Parameter
Storage
System Status
Storage Buffers
Battery Contact Failure
Out-of-Tolerance Voltage
Spikes
Limited Life
Manufacturing
Complexity
More Parts & Labor &
Board Space & Weight
System Design
Complexity
MRAM Applications
Aerospace and military systems
Digital Cameras
Notebooks
Smart Cards
Mobile Telephones
Cellular Based Stations
Personal Computers
Battery Backed SRAM Replacement
Media Players
Book Readers
MRAM array
Biomolecule labeled by magnetic markers
4 Motorola tunnel
MRAM demos
Honeywell GMR-MRAM
limited performance
0.256
Non Volatile
No need to refresh
(potentially) High density
Non destructive read
Read speed = write speed; < 50ns
Unlimited R/W endurance
Soft error immunity