Shift Registers (continued)

• The behavior of the A B C Out

In
serial shift register D Q D Q D Q D Q
is given in the listing
on the lower right
• T0 is the register
Clock CP
state just before
the first clock CP In A B C Out
pulse occurs T0 0 ? ? ? ?
• T1 is after the T1 1 0 ? ? ?
first pulse and T2 1 1 0 ? ?
before the second. T3 0 1 1 0 ?
• Initially unknown T4 1
states are denoted by T5 “?” 1
• Complete the last threeT6 1
rows of the table
•
2
•
Parallel Load Shift Registers
DA DB
• By adding a mux A B
between each shift register
stage, data can be IN D
Q
D
Q
shifted or loaded
• If SHIFT is low, SHIFT
A and B are CP
replaced by the data on DA and DB lines, else
data shifts right on each clock.
• By adding more bits, we can make n-bit parallel
load shift registers.
• A parallel load shift register with an added
“hold” operation that stores data unchanged
is given in Figure 7-10 of the text.

3
 Shift Registers with
Additional Functions
• By placing a 4-input multiplexer in front of
each D flip-flop in a shift register, we can
implement a circuit
with shifts right, shifts left, parallel load,
hold.
• Shift registers can also be designed to shift
more than a single bit position right or left
• Shift register can be designed to shift a
variable number of bit positions specified by
a variable called a shift amount.

4
 Multiplexers
• A multiplexer
is a
combinatio MULTIPLEX
nal circuit 2n
ER
Combination 1 Output
that selectsInputs al Logic
binary Circuit
information
from one of
many input
lines and n Selection Lines
directs the
information
to a single 5
 4-to-1-Line Multiplexer

D0 Function table
MULTIPLEX S1 S0 Output
D1 ER
4 O u tp u t
Inputs
Combination 0 0 D0
D2 al Logic
Circuit 0 1 D1
D3 1 0 D2
1 1 D3

S0 S1

6
Building MUXes

7
 Building
MUXes
• A MUX can be
built using
transmission
gates
• Mutiplexer blocks
can be
combined in
parallel with
common
selection and
enable lines to
perform 8
 Implementing Boolean
Functions Using MUX
• Any Boolean function of n-variables
can be implemented using a MUX
with n selection lines
• A more efficient method is using a
MUX with n-1 selection lines.
• Let us take a look at each method

9
 Example of Implementing
Boolean Functions Using MUX

10
 Example of Implementing
Boolean Functions Using MUX

11
 Demultiplexers
• Performs the inverse operation of a
multiplexer
• A combinational circuit that receives
input from a single line and
transmits it to one of 2n possible
output lines
• The selection of the specific output is
controlled by the bit combination of
n selection lines
• Same as a Decoder with an enable –
how? 12