Types Of Local Buses

VESA

Bus
PCI Bus
PCI Express
AGP

VESA Local Bus

The

first local bus was called as the VESA local

bus(also called as VL-Bus or VLB).

The

VESA(Video Electronics Standards Association)

was introduced in 1992 by VESA committee , a
non-profit organization originally founded by the
NEC to develop video display and bus standards.

The

VL-bus is a 32 bit bus . It is a direct extension

of the 486 processor/ memory bus.

It

can move data 32 bit at a time , enabling data to

full 32 bit data width of the 486 chip.

Purpose of VESA Bus

The

main purpose of VESA bus is

to increase the speed than ISA an
EISA Bus standards.
VESA bus is mainly designed the
to support the high speed video
controller.
It also support the disk and
network controller

Features of VESA bus

The

32-bit VESA bus has 112 pins.

32 address and data lines
It supports both 32 bit data transfer
It has Maximum throughput 128MBps to
132 MBps
Clock speed limit of 25-40MHz
It has strong based on Intel 80486
processor
It supports burst mode DMA transfer
It has direct access to system memory at
the speed of processor

It

can directly communicate to

the motherboard component
bypassing BIOS
It support the bus mastering
It is designed for use with single
processor system
It is backward compatible with
ISA/EISA

VL BUS

Type- A
With buffering

Type-2
Without Buffering

Drawback of VESA Bus

It

has speed limitation.

It does not support plug-and-play
It has timing problems, when
multiple cards are used
It can lead to loss of data
integrity, if VL-bus is not
implemented correctly
It does not support
multiprocessing
It does not support expansion to
64-bit Pentium system

PCI Local Bus

PCI

(Peripheral
component
Interconnect) bus was introduced by
Intel corporation in 1993.
It is fast , cheap , flexible and high
performance
expansion
bus
architecture as compared to the
earlier VL-bus and ISA.
The PCI is a recent high bandwidth,
processor independent bus.
This bus is support various high speed
device.
PCI bus is designed to be easily
interfaced
with
different

PCI bus

32-bit

64-bit

Features of 32-bit PCI bus

The

PCI bus is 32-bit has 124 pin

Clk speed limit is 33 MHz

Features of 64-bit PCI bus

Clk

speed limit has 66MHz

It has 188 pins

Common features
It

is support full bus mastering

Pipeline
Peer-to- peer card communication
Multiprocessing
Play-n-plug
Burst mode DMA transfers(both read and
write)
It is used to transfer data from peripherals
such as disk controllers, video cards,
modems, sound cards, network card,
graphic cards and extra ports or USB.

It

is independent platform
Support multiuser system
It allow Direct data transfer
among peripheral bypassing
processor
Low power consumption
Support 3 or 4 cards on a system
Coexist with ISA/EISA/MCA
It provides parity checking on
address, data and command .

processor
cache
Bridge/
memory
controller

DRAM

audi
o

Motio
n
video

PCI Local bus

LAN

SCSI

External
bus
interface

graphi
cs
Base I/O
function
s

ISA/EISA Mictrochannel

PCI Express bus

PCI Express(peripheral component
interconnect express) (PCIe or
PCI-E)is high speed serial
connection bus standard
development by Intel corporation in
2004.
It replace the PCI and PCI-X
expansion buses
It is fast, cheap and compatible or
handling more bandwidth and high
performance expansion bus
architecture as compared to the
earlier PCI and PCI-X

Purpose of PCI Express

Bus
Improved

handshaking
Better error detection
mechanism
Time dependent(real time) data
transfers

Features of PCI Express

It

has 8-bit per lane

It is based in high speed serial
communication
It has maximum throughput of 250Mbps to 8GBps
The PCIe 1.0 version has Clk speed
limit 2.5 GHz , PCIe 2.0 has 5GHz and
PCIe 3.0 has 8GHZ .
It has dedicated lane(connection)
controlled by switch. Each PCI Express
device doesnt have share bandwidth

It

has software compatible but not compatible

to hardware with PCI
it is support full bus mastering, concurrency ,
plug-n-play and multiprocessing.
The PCI Express x1 connector has 36 pin , x4
has 64 pins , x8 has 98 pins and x16 has
164pins
It is able to combine multiple connection to
form a single link it offers better graphics or
network connection
It is widely used in notebook ,desktop or
server
It support the up-plugging and down-plugging

AGP BUS
AGP

(Accelerated Graphics port) is

interfaced standard developed by Intel
corporation in 1997 .
It is actually an expansion slots , specially
designed for graphics cards
The increasing demand of 3D-computing
results in development of AGP slots
Intel introduced AGP into chipset for its
Pentium processor .
It provides faster and dedicated interface
between graphic card and processor

AGP versions
Version

Operatin
g modes

Clock
speed

Number
of bits

Maximum
throughp
ut

voltag
e

AGP 1.0

1x and 2x

66MHz

32 bit

533 MBps

3.3 v

AGP 2.0

1x ,2x and 66 MHz

4x

32 bit

1066 MBps 1.5 v

AGP 3.0

1x,2x,4x
and 8x

32 bit

2133 MBps 1.5 v

66 MHz

Features of AGP bus

32-

bit bus
Clk speed limit 66MHz
It has throughput of 366 MBps to
2.1GBps
It has 132 pins
It is specially designed for graphics card
32 address lines
32 data lines
It offers high speed data transfer to and
from RAM

It

support pipelining
It support only ne graphics card
on a system
It provide better bandwidth
within video system
It support automatic system
configuration to simplify
installation
It coexists with ISA/EISA/MCA/PCI
It has demultiplexing of address
and data bus which improves bus
efficiency