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Introduction to mixers
Mixer metrics
Mixer topologies
Mixer performance analysis
Mixer design issues
1
What is a mixer
Frequency translation device
Convert RF frequency to a lower IF or base band for
easy signal processing in receivers
Convert base band signal or IF frequency to a higher
IF or RF frequency for efficient transmission in
transmitters
Switching or sampling
A time-varying process
Preferred; fewer spurs
Active mixers
Passive mixers
3
x(t ) A cos 1t
y (t ) B cos 2t
x(t)y(t)
x(t)
y(t)
AB
AB
A cos 1t B cos 2t
cos(1 2 )t
cos(1 2 )t
2
2
down convert
up convert
VRF (t )
VLO (t )
VLO (t )
VIF (t )
VRF (t ) VLO (t )
ARF sin RF t sq LO t
2
1
A non-ideal mixer
Mixer Metrics
Conversion gain lowers noise impact of
following stages
Noise Figure impacts receiver sensitivity
Port isolation want to minimize interaction
between the RF, IF, and LO ports
Linearity (IIP3) impacts receiver blocking
performance
Spurious response
Power match want max voltage gain rather than
power match for integrated designs
Power want low power dissipation
Sensitivity to process/temp variations need to
make it manufacturable in high volume
7
Conversion Gain
Conversion gain or loss is the ratio of the
desired IF output (voltage or power) to the RF
input signal value ( voltage or power).
r.m.s. voltage of the IF signal
Voltage Conversion Gain
r.m.s. voltage of the RF signal
IF power delivered to the load
Power Conversion Gain
Available power from the source
If the input impedance and the load impedance of the
mixer are both equal to the source impedance, then the
voltage conversion gain and the power conversion gain of
the mixer will be the same in dBs.
8
Signal
band
Signal
band
Image
band
Thermal
noise
Thermal
noise
LO
LO
IF
Port-to-Port Isolations
Isolation
Isolation between RF, LO and IF ports
LO/RF and LO/IF isolations are the most
important features.
Reducing LO leakage to other ports can be
solved by filtering.
IF
RF
LO
12
LO Feed through
Nonlinearity in Mixers
Spurious Response
IF m RF n LO
IF
LO
IF LO
n
m, 0
1
RF
RF
RF RF
y n x m 0 y x 1
y IF RF
IF Band
x LO RF
18
Mixer topologies
Discrete implementations:
Single-diode and diode-ring mixers
IC implementations:
MOSFET passive mixer
Active mixers
Gilbert-cell based mixer
Square law mixer
Sub-sampling mixer
Harmonic mixer
19
RL
VIF
VRF
ID
VIF
VD
20
VIF
VLO
L
RL
t
VRF
VIF
Poor gain
Good LO-IF isolation
Good LO-RF isolation
Poor RF-IF isolation
Attractive for very high frequency applications where
transistors are slow.
21
VIF
VRF
VIF
22
RS
VLO
M1
M2
VLO
M4
VLO
VIF
VLO
M3
LO-
IF
RF+
Same idea, redrawn
RC filter not shown
IF amplifier can be frequency selective
[*] T. Lee
25
VLO
LO
RF
VOUT
GC
Vout IF 4
VRF RF
4
4
4
26
VLO
t
DC-term of LO
LO
RF
VOUT
t
4
4
4
3
5
27
200
VLO
VLO
Cbias 1nF
RS 200
VS
Vgg
Rsd
Rgg
VLO
M1
VLOCbias 1nF
Rgg
RL 2k
M2
Vsd
CL
M 2'
M 1'
Rsd
Cbias 1nF
28
Transistors are alternated between the off and triode regions by the LO
signal
RF signal varies resistance of channel when in triode
Large bias required on RF inputs to achieve triode operation
High linearity achieved, but very poor noise figure
29
RL
RL
VLO
M2
Vout
M3
VLO
I DC I RF
VRF
M1
30
Single-ended input
Differential LO
Differential output
QB provides gain
for vin
VCC
RL
RL
+ out -
LO+
vin + DC
Q1
Q2
LO-
QB
vout = gmvinRL
31
VLO
M2
VRF
RL
VOUT
M3
I DC I RF
VLO
M2
VRF
M3
VLO
I DC I RF
Gilbert Mixer
33
RL
RL
+ out -
LO+
Q1
Q2
Q3
Q4
LO+
LOQB1
+ vin -
QB2
34
I ds K SQ . VGSQ VT 0
Rb
VLO
VBB1
VRF
35
Cl arg e
Rb
VRF
Cl arg e
VBB1
I BIAS
VLO
IC ICO . e
Rb
VRF
VBE
VT
Cl arg e
VBB1
I BIAS
VLO
I CQ
2
T
VLO
37
Cmatch
IF Filter
RL
VBB2
RS
Cl arg e
Lg
I ds K SQ . VGSQ VT 0
RLO
Rb
VRF
VBB1
Le
Cl arg e
Matching
Network
VLO
38
Sub-sampling Mixer
39
Harmonic Mixer
Emitter-coupled BJTs work as
two limiters.
Odd symmetry suppress even
order distortion eg LO selfmixing.
Small RF signal modulates zero
crossing of large LO signal.
Output rectangular wave in PWM
LPF demodulate the PWM
Harmonic mixer has low self-mixing DC offset, very
attractive for direct conversion application.
The RF signal will mix with the second harmonic of the LO.
So the LO can run at half rate, which makes VCO design
easier.
Because of the harmonic mixing, conversion gain is
usually small
40
42
Single-ended input
Differential LO
Differential output
QB provides gain
for vin
VCC
RL
RL
+ out -
LO+
vin + DC
Q1
Q2
LO-
QB
43
VCC
RL
RL
vout1 = gmvinRL
vout2 = IQBDCRL
+ out -
LO+
Q1
Q2
LO-
IF signal is the RF LO
component in vout1
vin + DC
QB
So gain = ?
44
VCC
At what frequency is
Vout2 switching?
RL
RL
+ out -
vout2 = IQBDCRL
LO+
Q1
Q2
LO-
vout2 = SW(LO)IQBDCRL
This is feed through from
LO to output
vin + DC
QB
45
VCC
RL
+ out -
LO+
vin + DC
Q1
Q2
LO-
QB
46
VCC
If LO is generating a
square wave signal, its
output impedance is
very small, resulting in
small feed through
from RF to LO to
output.
RL
+ out -
LO+
vin + DC
Q1
Q2
LO-
QB
47
VCC
Ideally, contribution to
output is:
RL
+ out -
SW(LO)*gmvinRL
LO+
vin + DC
Q1
Q2
LO-
QB
48
Noise Components:
1. Noise due to loads
2. Noise due to the
input transistor (QB)
3. Noise due to
switches (Q1 and Q2)
RL
RL
+ out -
LO+
LOQ1
Q2
QB
49
RL
RL
+ out -
LO+
LOQ1
Q2
QB
50
1
f
4kT rb
2gm
RL
RL
+ out -
LO+
LOQ1
Q2
QB
51
2
out ,QB
RL
RL
+ out -
LO+
LOQ1
Q2
QB
gain v
2
2
in CE
52
n gain v
2
out ,QB
g m RL 4nkT
v
v
2
in CE
RL
RL
+ out -
LO+
LOQ1
Q2
QB
vin(CE) 2
1
f
rb
2gm
53
RL
If we assume rb is very
small:
g m RL
vT2
8kTRL 1
f
4
When:
RL
+ out -
LO+
LOQ1
Q2
QB
RL
RL
+ out LOQ1
Q2
QB
55
RL
+ out -
LO+
LOQ1
Q2
QB
no noise
noise
56
RL
RL
+ out -
LO+
LOQ1
Q2
QB
57
IP3:
The CE input transistor
(QB) converts vin to Iin
Multiplying by RL is
linear operation
Q1 & Q2 only modulate
the frequency
IP3mixer = IP3CEs Vbe->I
I QB I s e
(VBB vin ) / vt
RL
RL
+ out -
LO+
LOQ1
Q2
QB
1
1 2
1 3
I DC (1 vin 2 vin 3 vin ...)
vt
2v t
6v t
58
RL
RL
+ out -
LO+
Q1
Q2
Q3
Q4
LO+
LOQB1
+ vin -
QB2
59
+1
-1
Local Oscillator
vout = gmvinRL
vout = gmvinRL
60
Three stages:
CE input stages
Switches
Output load
61
VCC
RL
RL
+ out -
IP3:
Similar Taylor series
LO+
expansion of
transducer transistors
Vin split between two
Qs, it can double
before reaching the
same level of
nonlinearity
IIP3 improved by 3 dB
Q1
Q2
Q3
Q4
LO+
LOQB1
+ vin -
QB2
62
VC C
RL
+ out -
LO+
Better linearity
RL
V Bias
Q1
Q2
LO-
QB
vin
IDC
63
Mixer Improvements
Debiasing switches
from input transistors:
To lower NF we want
high gm, but low Q1
and Q2 current
Conflicting!
g m RL RS
4
64
RL
RL
VLO
M2
Vout
M3
VLO
I DC I RF
VRF
M1
65
VLO
t
VOUT
t
66
IF Filter
VOUT
67
RF
IF
LO
LO RF
RF LO
LO RF
LO RF
68
SMIX
SLO LO
LO RF
RF LO
2 LO
3 LO
69
VLO
RS
VS
RL
Vout
M3
M2
Cl arg e
Lg
VLO
GM VRF
Rb
VGG
Ls
VLO
VGG 2
RL
Lg
RL
Vout
M3
M2
Lm2
RS
VS
Cl arg e
Lg
Lg
VLO
Lm3
GM VRF
Rb
VGG1
Ls
VLO
RS
Lg
Rb
VGG
Vout
M3
M2
Cl arg e
VS
RL
VLO
GM VRF
Ls
VLO
M2
Vout
RL
VLO
M3
VGG
RS
Ibias
Cc
VS
Using the common gate stage as the transducer improves the linearity of
the mixer. Unfortunately the approach reduces the gain and increases
the noise figure of the mixer.
73
VLO
RL
Vout
M3
M2
VLO
0.5TLO
RS
VS
Cl arg e
Lg
Rb
VGG
GM VRF
Ls
0.5TLO
0.5TLO
0.5TLO
The strong LO easily feeds through and ends up at the RF port in the
above architecture especially if the LO does not have a 50% duty
cycle. Why?
74
M3
M2
VLO
GM VRF
VBB2
RS
Cl arg e
VS
Lg
Rb
VBB1
Ls
The amplified RF signal from the transducer is passed to the commuting switches
through use of a common gate stage ensuring that the mixer operation is unaffected.
Adding the common gate stage suppresses the LO-RF feed through.
75
VLO
RS
Lg
Rb
VBB1
Vout
M3
M2
Cl arg e
VS
RL
VLO
GM VRF
Ls
The strong LO-IF feed-through may cause the mixer or the amplifier following the
mixer to saturate. It is therefore important to minimize the LO-IF feed-through.
76
VLO
M2
VRF
RL
VOUT
M3
I DC I RF
VLO
M2
VRF
M3
VLO
I DC I RF
VLO
M2
RL
VOUT
Vout
M3
VLO
M2
I DC I RF
VRF
VRF
Vout
M3
VLO
I DC I RF
VLO
M3
M2
VRF
RL
VOUT
M1
VLO
M3
M2
I DC I RF
I DC I RF
M1
VLO
VRF
Show that:
K SQ 1/ 2
K SQ
1
VIF 2 I DC RL
*VRF .
2
I
2
2
I
DC
DC
3/ 2
3
RF
...
IIP3 in volts
8 I DC
3K SQ
79
RL
VLO
RS
Cl arg e
VS
Vout
1
Cgs
RL
M3
M2
VLO
Lg
Rb
VBB1
Lg Ls
Ls
80
Mixer Gain
RL
VLO
Vout
RL
M3
M2
VLO
M1
GM
1
2 RS
TLO
0
: Vout Vcc I DC I sig .RL Vcc I DC I sig .RL
2
TLO
TLO : Vout Vcc Vcc I DC I sig .RL I DC I sig .RL
2
Vout sig I sig RL * SW I sig RL
4
1
1
1
cos
cos
3
cos
5
cos 7 LO t
LO
LO
LO
3
5
7
81
82
L par 2nH
VCC 3.0V
RL 400
VLO
M2
VRF
Vout
M3
VLO
M1
83
RL CL
VLO
RS
Cl arg e
VS
M3
Vout
VLO
Lg
Rb
VBB1
M2
RL
Ls
84
Vout
M3
M2
VLO
Instantaneous Switching
RL
VLO
VOUT
t
I DC ,mix I RF I Noise
VRF
M1
LO RF
RF LO
LO RF
85
Vout
M3
M2
VLO
RL
VLO
VOUT
t
I DC ,mix I RF I Noise
VRF
M1
If the switching is not instantaneous, additional noise from the switching pair will
be added to the mixer output.
Let us examine this in more detail.
86
VLO
Vout
M 2 on
RL
M 3 off
VLO
VOUT
t
I DC ,mix I RF I Noise
VRF
M1
VLO
Vout
M 2 off
RL
M 3 on
VLO
VOUT
t
I DC ,mix I RF I Noise
VRF
M1
VLO
Vout
M 2 on
RL
M 3 on
VLO
VOUT
t
I DC ,mix I RF I Noise
VRF
M1
When VLO+ = VLO- (i.e. the LO is passing through zero), the noise
contribution from the transducer (M1) is zero. Why?
However, the noise contributed from M2 and M3 is not zero
because both transistors are conducting and the noise in M2 and
M3 are uncorrelated.
89
VLO
M 2 on
Vout
RL
M 3 on
Trise
VOUT
VLO
I DC ,mix I RF I Noise
g m W ... fixed I DC
VRF
M1
1
T
... fixed I DC
W
Design the transducer for minimum noise figure.
90
VLO
Vout
M 2 on
RL
M 3 on
VOUT
VLO
I DC ,mix I RF I Noise
VRF
M1
RL
VLO
Vout
M2
RL
M3
VLO
2
vnoise
RL 4kT 2 RL
I DC ,mix I RF I Noise
VRF
M1
IF
RF LO
92
VLO
Vout
M2
RL
M3
VLO
I DC ,mix I RF I Noise
VRF
VLO
t
M1
Cos LOt
Cos 3 LO t
Cos 5 LOt ...
3
5
inoise M 1 t .
93
Cos LO t
Cos 3 LO t
Cos 5 LO t ...
3
5
inoise M 1 t .
IF
2
noise M 1
SW f
3 LO
LO
4kT
f .
.4kTg m1
Rch
5 LO
2
inoise
M 1 IF 2.
4
4
LO 3 LO ...
4
1 1
. 1 2 2 .. . 4kTg m1
3 5
2
inoise
M 1 IF 4. 4kTg m1
94
M 2 on
M 3 on
id 2 id 3
4 kT
4 kTgm
Rch
VLO
vgn .
4kT
gm
gm vgs
id
gm vgs
95
VLO
Vout
M2
RL
M3
VLO
VLO
I DC ,mix I RF I Noise
VRF
Gm
M1
Gm 0
VLO
Show that:
Gm g m 2 g m 3 g m 2,3
2.I DC ,mix
V
96
TLO
2
Gm
iout
97
Gm t
TLO
2
2
p
T
/
2
LO
Gm f
T
Gm t Gm 0 .
T
/
2
LO
p 2 p
3 p
T p
Sin
k.
2
1
T .Gm 0 .
.2Cos k pt
LO k 1
p
k
.
2
2
vn m 2,3 f
vn m 2,3 2. .
2 p
4kT
g m 2,3
3 p
98
Gm f
p 2 p
Gm f
vn m 2,3 f
3 p
vn m 2,3 f
p 2 p
3 p
1
2
inoise
2
99
1
2.I DC ,mix
.Gm2 0 .T .vn2 m 2,3 G g g g
m
m2
m3
m 2,3
TLO
V
2 I DC ,mix
2
Gm 0
V Slope. T
VLO t ALO Cos LO t
V
dVLO t
4kT
Slope t 90
vn m 2,3 2. .
LO LO
LO
dt
g m 2,3
LOt 90
1
1
4kT
2
2
2
2
inoise M 2,3 IF
.Gm 0 .T .vn m 2,3
.Gm 0 .T . 2. .
TLO / 2
TLO / 2
g
m 2,3
2.I
1
1
.Gm 0 .T . 2. .4kT
. DC ,mix .T . 2. .4kT
TLO / 2
TLO / 2 V
2
inoise
M 2,3 IF
2 I DC ,mix
T 2 I DC ,mix
1
. 2. .4kT .
. 2. .4kT .
TLO / 2
V
TLO / 2
ALO LO
I DC ,mix
4. 4kT
A
LO
100
2
noise M 1
4kT 2 RL
g m short
dI DS short 1
I DS short
WCox vsat
dVGS
2
VGSQ VT 0
IF 4. 4kTg m1 4. 4kT .
I DC ,mix
GSQ
VT 0
I DC ,mix
A
LO
2
inoise
M 2,3 IF 4. 4kT
2
2
2 2
2 2
vnoise
MIX IF vnoise RL RL inoise M 1 RL inoise M 2,3
2
noise MIX
IF 4kTRL
1 4. .
I DC ,mix
GSQ
VT 0
.RL 4. .
I DC , mix
ALO
.RL
101
IF 4kTRL
1 4. .
I DC ,mix
GSQ
VT 0
.RL 4. .
I DC , mix
ALO
.RL
2
vnoise
MIX IF
VGSQ 0.8V
VGSQ 1.6V
VLO
102
RL
VLO
Vout
M2
RL
M3
VLO
I DC ,mix I RF I Noise
VRF
M1
LO
RF
103
RL
VLO
Vout
M2
RL
Noise from RL
M3
VLO
I DC ,mix I RF I Noise
VRF
M1
LO
RF
104
2
RL
VLO
Vout
RL
M2
VRF
VLO
M3
VLO
M1
I M 1
DC
4
4
Cos LO t
Cos 3 LO t ...
105
RL
VLO
Vout
M2
VRF
RL
M3
VLO
I Noise M1
I Noise 1/ f
I Noise thermal
M1
DC , mix
106
RL
VLO
Vout
M2
DC-term of LO
RL
M3
VLO
VRF
M1
LO
RF
3 LO
4
4
I
.
DC
Cos
Cos
3
...
107
id id thermal id 1/ f
VLO
M 2 on
id 1/ f
M 3 on
id 2 id 3
Kf
.g .
CoxWL
f
VLO
vgn 1/ f
2
m
Kf
1
CoxWL f
.
gm vgs
gm vgs
108
RL
vgn 1/ f
VLO
M2
DC , mix
Vout
RL
M3
VLO
VLO
109
vgn 1/ f
VLO
iout
110
iout
T t
vgn 1/ f t
2 ALO LO
111
vgn 1/ f t
TLO
T LO
Noise Energy T t .I DC ,max . t k
.
I
.
k
DC ,max
2
2
A
k 0
k 0
LO LO
vgn 1/ f f
inoise 1/ f
.I DC ,max
2 ALO
vgn 1/ f f
vgn 1/ f t
I DC , mix
1
0.5TLO
iout
0.5TLO
I DC ,mix
iout
t
1
0.5TLO
112
Q21 Q2 2 Rb
Rb
Vin
Q2' 2 Q2' 1
Vin
Cc
VLO
Cc
VLO
Vgnd
Vcc
Q1
Le
Q1'
Vgdcom
Le
L par 2nH
113
RL
RL 200
VS
RS 200
Vin
C 10nF
I BQ
Lb
Vb
Rb
Q21 Q2 2
Rb
Rb Rb '
'
Q2 2 Q21
Vb
Vb
Cc Q '
1
Cc
Q1
VLO VLO
Le
Vgdcom
I BQ
Lb
Vin
C 10nF
VS
Le
L par 2nH
114
RL
RL 200
VS
RS 200
Vin
C 10nF
I BQ
Lb
Vb
Rb
Q21 Q2 2
Rb
Rb Rb '
'
Q2 2 Q21
Vb
Vb
Cc Q '
1
Cc
Q1
VLO VLO
Le
Vgdcom
I BQ
Lb
Vin
C 10nF
VS
Le
L par 2nH
115