Vijay FPP ESD PT11

Final Project Presentation
Design and Development of Power Factor

Corrected, High Efficiency, Automatic AC Voltage
Regulator System for Wide Input Range
Vijaya Gandhi M
CWB0411010, PT11
M. Sc. [Engg.] in Electronic System Design Engineering
Academic Guide : Mr. Ugra Mohan Roy
M.S.Ramaiah School of Advanced Studies
Aim and Objectives of the Project

Aim :
To design, develop and verify a high efficiency,
automatic, wide input AC voltage (85V to 265V)
regulator system with Power Factor Correction - for
1000W electric load.
Aim and Objectives of the Project

Objectives :
To review literature on AC voltage regulator technologies,
PFC(Power Factor Correction) topologies, inverter technologies.
To arrive at design specifications of the proposed
AVR(Automatic Voltage Regulator) system.
To select and design appropriate active PFC topology and its
required control circuitry.
To select and design appropriate DC(PFC output) to AC
conversion topology and its control circuitry.
To integrate and verify the designed AVR system functionality
for 1000W electric load.
Methods and Methodology

Literature review and analysis for voltage regulator design, PFC
and inverter is carried out by referring reviewed journals, books,
manuals and related documents.
AVR system specifications are arrived at based on input
requirements and output requirements for connected loads.
The control signals, voltage sense and current sense circuits are
designed and developed to meet the individual specifications of
PFC functional blocks.
MOSFET driver and control circuitry is designed for PFC
topology.
All design calculations for PFC are carried out, components and
necessary custom parts are selected and designed.

The control signals, voltage sense and current sense circuits are
designed and developed to meet the individual specifications of
inverter functional blocks.
IGBT driver and control circuitry is designed for inverter.
Heatsink design for PFC and inverter switches are carried out.
All design calculations for inverter are carried out, components
and necessary custom parts are selected and designed.
Schematic of the functional block diagram of PFC and inverter are
developed by using OrCAD software.
PADS PCB design tool has been used to develop the gerber file of
the PCB conforming to the developed schematic and High AC
voltage and DC voltage design guidelines.

Firmware is developed for the chosen microcontroller which
controls the AVR system.
Designed PCB is reviewed as per standard set of guidelines.
Gerber files are supplied for the PCB fabrication.
The fabricated PCBs are assembled.
The AVR system is programmed with developed firmware and
tested for its functionality through the development of necessary
test setup and test cases.
System performance reports are generated.
Introduction
With the development in advanced power semiconductor devices, more

and more switched mode power supplies(SMPSs) and other power
switching circuits are used in modern systems. Due to the nonlinear
behavior of power switched circuits, distorted currents are normally
drawn from the AC line, resulting in low power factor (usually less than
0.67) and high total harmonic distortion(THD).
In order to address the above stated issues, the voltage regulator systems
must be power factor corrected, high efficient and with less total
harmonic distortion.
Adding active Power Factor Correction in AC voltage regulators
found to have not been addressed.
Need Analysis for PFC in Regulators

AC Voltage
AC Current
Power
Factor left
un-corrected
Input voltage and current waveforms without PFC. The voltage waveform is a sine wave
and the current waveform is a pulse or spike. PF<1(0.65 or less for SMPS loads in general)
Power
Factor
corrected
Voltage and current waveforms are sinusoidal and in phase. PF= 0.99

PFC Increases the Supplys Output Power Capability
The PF, much like the power supplys efficiency rating,
determines the amount of useful power a switch mode power
supply can draw from the AC line and then deliver to its output
load.
Specifically, the formula that determines this is:
VLrms x ILrms x PF x Eff = Pout
As an example, if a power supply is operating off 120VAC line,
which is protected by 15A circuit breaker, UL(Underwriters
Laboratories) guidelines say you should not draw more than
12A.

So, using the formula above, we can compare two power supply
examples with different Power Factors, as follows:
Example A: No PFC, PF = 0.65, 85% Efficiency, 120VAC input,
12A max. current:
Therefore: 120VAC x 12A x 0.65 x 0.85 = 796 Watts Output Power
Example B: PFC used, PF=0.98, 85% Efficiency, 120VAC input,
12A max. current:
Therefore: 120VAC x 12A x 0.98 x 0.85 = 1200 Watts Output
Power
As can be seen above, the power supply in Example B (with PFC)
can deliver 404 Watts or 51% more power to its output load than
the non-PFC supply, a significant increase.
10

PFC is Required by International Regulations.
PFC is needed to comply with international regulations, especially
in Europe.
Since 2001, the European Union (EU) established limits on
harmonic currents that can appear on the mains (AC line) of
switched mode power supplies.
Today, the most important regulation is the European Norm
EN61000-3-2.
This regulation applies to power supplies with input power of 75
watts or greater, and that pull up to 16 amps off the mains.
It sets severe limits on the harmonic currents up to the 39th, when
measured at the input of switch mode power supplies.
11
Literature Review
Kuo- Kai Shyu, Ming-Ji Yang, Jing-Heng Hong and Bau- Hung Lin(2004) present a conference paper
on Automatic Voltage Regulator Using a novel Phase shifted PWM is proposed. This system uses a
bulky transformer for series voltage compensation. This method doesnt operate for wide AC input.
This method doesnt address the PFC, hence doesnt address the bulky EMI filter components and
Total Harmonic Distortions.
(Dong-Hee Lee, Jin-Woo Ahn, and Tae-Won Chun(2007) presented variable gain control scheme of
digital automatic voltage regulator for AC brushless generator.
a PID controller with a simple gain adjustor is used. And the gains of PID controller are updated by
the terminal voltage and load current in order to improve dynamic response and stability. The structure
of the proposed gain adjustor is designed by a simple linear function and the gain is increased inproportional to load current and terminal voltage.
Hamdy Ahmed Ashour(2004) presented a new electronic voltage stabilizer topology utilizes four
AC switches in a form that may be named as "AC H-bridge connection, and based on pulse width
modulation (PWM) AC chopper combined with a single low power compensating transformer.
Such topology eliminates the need of the main input multi-tapping transformer, hence
reducing the overall size, weight and cost.
12
Literature Review continued..

Jinn-Chang Wu(2011) presented a AVR in which the power electronic switches of only one arm are
switched in high frequency, while those of the other arms are switched in low frequency. Hence, the
switching loss of this AVR can be reduced. Moreover, the capacitance of the dc capacitor in the threearm power converter is very small. Hence, the size and cost can be reduced.
Nang Kaythi Hlaing, LwinLwin(2010) presented microcontroller based AVR. A triac, a step-up
transformer, a zero crossing circuitry and a load voltage sensing circuitry. This design is based on
the principle of phase control of ac voltage using a triac. The trigger pulse for the triac is delayed
by the microcontroller to provide the desired regulator terminal voltage.
Chin-Yuan Hsu(2011) presented an analysis design of the LLC resonant half-bridge converter with
natural interleaving power factor correction circuit. Then, the impact of Q and parameters on the
LLC resonant half-bridge transfer function is analyzed.
Yong-Seong Roh(2012) presented a two-phase interleaved critical conduction mode (CRM) power
factor correction (PFC) boost converter with a variation-tolerant phase shifter (VTPS) which
ensures accurate 180 deg phase shift between the two interleaved converters. A feedback loop
similar to a phase locked loop (PLL) controls the amount of the phase shifting of the VTPS.
13
Literature Review continued..

A. R. Prasad(1991) presented novel active power factor correction method for power supplies with
three-phase front-end diode rectifiers. The implementation of this method requires the use of an
additional single switch boost chopper. The combined front-end converter draws sinusoidal ac
currents from the ac source with nearly unity input power factor while operating at a fixed
switching frequency.
Anitha. U, Sampath kumar Boini(2012) presented microcontroller based AVR. an Active Power
Filter (APF) based on simple control technique to provide reactive power and harmonics
compensation or non-linear single-phase loads. A voltage source inverter with carrier less
hysteresis PWM current control is used to form an APF.
Jong C. Wang, Hon-Ji.Chen(2008) proposed two current sharing control schemes base on average
current mode control for interleaved Power Factor Correction (PFC) converter. The boost inductor
current of each phases of interleaved PFC must be sensed to achieve current sharing and power
limiting.
Jong-Hyun Kim(1998) proposed a novel pulse width modulation buckboost ac chopper using
regenerative dc snubbers is proposed and analyzed. Compared to the previous buckboost ac
choppers, ac snubbers causing power loss are eliminated using regenerative dc snubbers. Since proper
switching operation for solving the commutation problem is utilized, the proposed ac chopper is
reliable and power loss due to ac snubbers is eliminated.
14
Literature Summary
Most of the existing solutions support different input voltages, collectively from 160250VAC range and do not support wide universal AC input (85 -265VAC) range.
Literature reviews refer to poor regulated output voltage i.e. voltages between 200 240VAC.
Literature review papers based solutions cut out the power if AC input is out of 160
250VAC range, which will trip the connected equipments.
Most of the solutions use line frequency transformer, which increases weight and
overall cost of the system.
None of the existing voltage stabilizers provide Power factor correction, hence causes
high electricity bill and PF penalty as well, reduce overall efficiency.
Some systems use tap change techniques to regulate the voltage, which interrupt the
output voltage momentarily and that can reset/trips the computer or other electronics
equipments.
None of the papers presented on regulators support for universal voltage (85 to
265VAC) and do not provide PFC.
In this case all load equipments should have its PFC correction taking place within.
The solutions presented are specific to some countries; they do not work in different
geographic regions.
15
Application Diagram of AVR
Usage of AVR in day to day applications

16
Block Diagram of AVR
High level block diagram

of automatic
AC AC
converter system
M.S.Ramaiah
School of Advanced
Studies
17
AVR System Specs

Input:
AC Input Voltage Range

AC Input line frequency
85 - 265VAC, Single Phase

47Hz - 63Hz
220V+/- 1%
50Hz
0.99
>93% @ full load
Output:
AC output Voltage
AC output frequency
Power Factor
Efficiency
Protection Features:
Input under/over voltage protection

Over load protection
Output Short Circuit protection
Over temperature protection
Cooling
<85VAC, >265VAC
up to 300% of rated power for <0.5sec
Yes
Yes
Forced Cooling
18
Power Factor- Explanation

Special electrical requirement of inductive loads.
Most loads in modern electrical distribution systems are inductive. Examples
include motors, transformers, gaseous tube lighting ballasts, and induction
furnaces. Inductive loads need a magnetic field to operate .
Inductive loads require two kinds of current:
Working power (kW) to perform the actual work of creating heat, light,
motion, machine output, and so on .
Reactive power (kVAR) to sustain the magnetic field.
Working power consumes watts and can be read on a wattmeter. It is
measured in kilowatts (kW). Reactive power doesnt perform useful work,
but circulates between the generator and the load.
Working power and reactive power together make up apparent power .
Apparent power is measured in kilovolt-amperes (kVA) .
PF measures how effectively electrical power is being used. A high power
factor signals efficient utilization of electrical power, while a low power
factor indicates poor utilization of electrical power.
19
Power Factor- Explanation Contd

Power factor is the ratio of working power to apparent power.
To determine power factor (PF), divide working power (kW) by apparent
power (kVA). In a linear or sinusoidal system, the result is also referred to as
the cosine .
PF = kW/kVA = cosine
Power Triangle
20
Active or Passive PFC

Power Factor Correction (PFC) allows power distribution to operate at its
maximum efficiency.
There are two types of PFC, Active PFC and Passive PFC.
Active PFC
The preferable type of PFC since it provides more efficient power frequency.
Because Active PFC uses a circuit to correct power factor, Active PFC is able
to generate a theoretical power factor of over 0.95
Active Power Factor Correction also markedly diminishes total harmonics,
automatically corrects for AC input voltage, and is capable of a full range of
input voltage.
Since Active PFC is the more complex method of Power Factor Correction, it
is expensive to produce an Active PFC power supply.
21
Active PFC or Passive PFC Contd

Passive PFC
The most common type of PFC is Passive Power Factor Correction (Passive
PFC).
Passive PFC uses a capacitive filter at the AC input to correct poor power
factor.
Passive PFC may be affected when environmental vibration occurs.
Passive PFC requires that the AC input voltage be set manually.
Passive PFC also does not use the full energy potential of the AC line.
SMPS with passive PFC can achieve power factor of about 0.6 to 0.75.
22
Conventional Vs Interleaved PFC

General Comparison
Parameters
Power
EMI/Noise
Output Voltage Surge
Input Current Surge
Magnetics size
Efficiency
Conventional Active
PFC
<3000W
Normal
High
High
High
Low (<85%)
Interleaved Active
PFC
>3000W
Low
Low
Low
Low
Normal to High (>94%)
Simulation Parameters
Parameters
Vin
Vout
Pout
Fsw
Cout
L
Conventional Active
PFC
220+/-5%
400V+/-5%
Up to 3000W
100kHz
3300uF
270uH
Interleaved Active
PFC
220+/-5%
400V+/-5%
>3000W
50kHz
3300uF
270uH
Components Comparison
Parameters
Main Switch
Fast Diode
Bridge Diode
Inductance
Capacitor
Cost
Conventional Active Interleaved Active

PFC
PFC
1
2
1
2
4
4
1
2
M.S.Ramaiah
School
of
Advanced
Studies
1
1
Low
High
23
Advantages of Interleaved PFC

Interleaved PFC is gaining popularity in external and
embedded-type power supply architectures.
It is exceptionally flexible and provides many cost-saving
features such as passive-component(inductor and output
capacitor) size reductions, smaller EMI filtering components
and higher efficiencies.
Other benefits of interleaving include scalability and
ultrathin designs.
Scalability allows for addressing many different power
levels and applications.
24
Interleaved PFC
In high power applications interleaving PFC stages can
reduce inductor area and reduce output capacitor ripple
current.
This is made possible through the inductor ripple current
cancellation that occurs with interleaving.
25
Interleaved PFC Block Diagram

AC
Source
Bridge
Rectifier
EMI Filter
Interleaving
Channel1
FET Driver
Interleaving
Channel2
FET Driver
6W Fly-back
Power Supply
For house
keeping
12V, 0.5A
To supply PFC
controller chip and
FET driver chips
Output
Cap
Bridge O/P
Voltage Sense
Interleaved
PFC
Controller
UCC28070
Interleaving
Current Sense
Channel1
Interleaving
Current Sense
Channel2
PFC Output
Voltage Sense
26
Interleaved PFC Design Specs

Definition
RMS input Voltage(AC line)
Output Voltage(DC)
Vripple
Line Frequency
Power Factor at maximum load
Output Power
Full load efficiency
Minimum
Typical
Maximum
Units
85
110 or 220
265
344
390
425
30
47
63
Hz
0.95
1000
90
The Interleaved uses the UCC28070 PFC interleaved controller to shape

the input current waveform to provide power factor correction.
Interleaving boost pre-regulator stages enables the power supply designer to
reduce boost inductor area product by 50% and reduce boost capacitance
RMS current. This allows the designer to reduce the size of the PFC preregulator; as well as, use output filter capacitors with lower RMS ratings.
27
Interleaved PFC-Design Inputs

Input Parameters
Vmin-rec=Rectified Vmin
120.21
Dmax=Max duty cycle
0.95
Efficiency
95%
Pout
1200
Vout
390
Vdc
F-line
50
Hz
Vin-min= minimum AC input
85
Vac
Dmin-LL= Minimum duty cycle

del IL= inductance current
ripple
fs=switching frequency
Vout-ripple
0.69
14.12
150000
Hz
29.25
PFC Design Input Parameters

28
Interleaved PFC- Design Calculations

1
Boost Inductors (L)

selection
L
Cout selection
Cout
Cout selection
Cout
max Cout
20% derated Cout
ESRmax selection
ESRmax
MOSFET selection
Ipft(flat top)
Ipft
Ipeak
Ipeak
Prds(on)
Estimated AC-DC
Conversion loss
Estimated AC-DC
Conversion loss
Diode Parameters
Idiode
Idiode
Id-peak
( Vin-min* sqrt(2)*Dmin-LL)/(del IL *fs)

39.16782312
(2*Pout*(1/F-line))/(Vout^2-(Vout/2)^2)
421
1/4*(Pout/(Vout*Efficiency*0.637))/
(Vripple*0.8*3.141*fLine)
346
421
657
(Vout-ripple*0.2)/((Pout*Sqrt(2))/(Vinmin*efficiency))
0.28
micro Henry
*Based on Hold up
Energy
micro Farad
*Based on output
voltage ripple
micro Farad
micro Farad
micro Farad
Ohms
(Dmax/Efficiency)*((Pout/2)/Vmin-rec)
4.99
( (Pout* sqrt(2))/(2*Vin-min*Efficiency)+(del
Il1/2) )
17.6
Ifet(rms)*Rds(on)
((Pout/Efficiency)-Pout)*0.5
31.58
(Pout)/(2*Vout*Efficiency)
1.62
M.S.Ramaiah School
of Advanced Studies
( (Pout* sqrt(2))/(2*Vin-min*Efficiency)+(del
Il1/2) )
29
Interleaved PFC Switching
Switching Waveforms of Interleaved MOSFETs
30
AVR System Test Setup
AVR System Test Setup

31
AVR System Boards
AVR System Boards

32
PFC- Prototype Efficiency at Extreme Input
Interleaved PFC Prototype Efficiency Curve For Extreme Input Range

33
PFC- Prototype Efficiency at Typical Input
Interleaved PFC Prototype Efficiency Curve for Typical Input Voltages

34
PFC- Prototype PF at Extreme Input
Interleaved PFC Prototype PF for Extremes Input Voltages

35
PFC- Prototype PF at Typical Vin
Interleaved PFC Prototype PF for Typical Input Voltages

36
PFC- Prototype PF Waveform
System Output Voltage and Current Waveforms Show PF=0.99,

load connected to the system is a typical Switched Mode Lab
Power Supply
37
Selection of Inverter Topology
Among different inverter systems, there are 2 different types.

Type1: Voltage output type, which output the AC voltage as a
voltage source.
Ex: The inverter in the UPS system is a typical voltage type
inverter.
Type2: The current type, which output the AC current in a
specified power factor.
Ex: The motor control inverter and the solar inverter are the
current type inverters.
Full-bridge current type topology including 4 IGBTs, which is
easy to get started and transplant to the real product.
38
Full-Bridge Current Type Inverter

D
C
Full bridge current type inverter topology
39
Inverter Block Diagram

390V DC BUS
Clean
Sine wave
BUS Voltage
Sense
12W Fly-back
Power Supply
12V, 1A
House Keeping
Power Supplies
for control
circuitry
3.3V, 1A
H-Bridge
Inverter
Switches
Sine wave
LC Filter
C
T
220V AC Relay
& Output
Connector
4
IG BT Drivers
4
O/P Current Sense

(Op-Amp based)
5V, 0.5A
Digital
Controller
TMS320F28027
JTAG
O/P Voltage Sense

(Op-Amp based)
Zero Crossing
Detector
40
Full-Bridge Current Type Inverter- PWM

When in the positive cycle of the sine wave,
the output voltage of the inverter is changing from
Vdc to 0, while the negative cycle, it is the Vdc to
0.
So in the positive cycle, if the duty of Q1 is d ,
then we can get the relation between the output
voltage Vo and the DC bus voltage Vbus.
Vo= d*Vbus
Single Polar Modulation Technique

41
PWMs for Inversion

42
Single Polar Modulated PWMs for Inversion

43
Design of Inverter
The key components of the inverter are 4 pieces of 600V IGBT.

The IGBT drivers are designed to the module type. Besides, 2
pieces of 2.5mH inductor are used. 2 pieces of relay are used to
control the output voltage connection. Current sense transformer
is used to sense the inductor current. A piccolo mixed signal micro
controller specially designed for power conversion applications is
used.
There are 3 key signals used in the controller loop:

1 Input DC BUS voltage.
2 Output inductor current.
3 Output AC voltage.
44
Design of Inverter- Key Components
IGBTs : 600V, 70A, 200W, TO-247AC

Isolated IGBT driver circuits.
Two 2.5mH, 5A inductors (one each for line and neutral)
Output CAP: 1uH, 275VAC
10A, 250VAC output fuse
Current sense transformer with burden resistor for output current
measurement.
Output voltage sense circuitry
Output frequency measurement with op-amp based zero crossing
detector circuit
Fly-back power supply for generating house keeping power supplies.
32- bit microcontroller(TMS320F28027) with PWMs support, A piccolo
mixed signal micro controller specially designed for power conversion
applications is used.
45
Design of Inverter-O/P Frequency Measurement
Zero crossing detect
The zero crossing detection is used to measure frequency

output.
The design uses a comparator to get a falling edge in every
positive zero crossing.
46
Design of Inverter- O/P Voltage Sense

V at ADC V at ADC
(+ve
(-Ve
Vout Vo,pk
Vfb,pk Vfb,rms Cycle)
Cycle)
0.03311
10.00 14.14 0.0033113 0.047
3
1.697
1.603
0.06622
20.00 28.28 0.0033113 0.094
5
1.744
1.556
0.09933
30.00 42.42 0.0033113 0.140
8
1.790
1.510
0.13245
40.00 56.56 0.0033113 0.187
0
1.837
1.463
0.16556
50.00 70.70 0.0033113 0.234
3
1.884
1.416
0.19867
60.00 84.84 0.0033113 0.281
5
1.931
1.369
0.23178
70.00 98.98 0.0033113 0.328
8
1.978
1.322
0.26490
80.00 113.12 0.0033113 0.375
1
2.025
1.275
0.29801
90.00 127.26 0.0033113 0.421
3
2.071
1.229
100.0
0.33112
0 141.40 0.0033113 0.468
6
2.118
1.182
110.0
0.36423
0 155.54 0.0033113 0.515
8
2.165
1.135
120.0
0.39735
0 169.68 0.0033113 0.562
1
2.212
1.088
130.0
0.43046
0 183.82 0.0033113 0.609
4
2.259
1.041
140.0
0.46357
0 197.96 0.0033113 0.655
6
2.305
0.995
150.0
0.49668
0 212.10 0.0033113 0.702
9
2.352
0.948
160.0
0.52980
0 226.24 0.0033113 0.749
1
2.399
0.901
170.0
0.56291
0 240.38 0.0033113 0.796
4
2.446
0.854
M.S.Ramaiah
School
of Advanced
180.0
0.59602
0 254.52 0.0033113 0.843
6
2.493
0.807
Diff AMP
Gain
Diff Amp
Gain
Vout Rms
Vo,P
k
Vfb,p
k
0.0033112
58
220 Vrms
311.08 V
1.0300662
25 V
0.7284768
V
at ADC = Vfb +1.65 (for
Vfb,rms
21 +Ve
V
Cycle)
V at ADC = Vfb -1.65 (for -Ve
Cycle)
Output Voltage Sense Calculations

Studies
47
Design of Inverter- O/P Current Sense

Io.rms Io,pk
VIfb at
VIfb at
ADC
Rsens
Ifb, Vifb.p Vifb,r ADC (+Ve (-Ve
e
Ifb,pk
rms k
ms
Cycle)
Cycle)
100.00
0.001
0 3.54E-04 0.025 0.035 0.025
1.685
1.615
100.00
0.001
0 7.07E-04 0.05 0.071 0.050
1.721
1.579
100.00
0.001
0 1.06E-03 0.075 0.106 0.075
1.756
1.544
100.00
0.001
0 1.41E-03 0.1 0.141 0.100
1.791
1.509
100.00
0.001
0 1.77E-03 0.125 0.177 0.125
1.827
1.473
100.00
0.001
0 2.12E-03 0.15 0.212 0.150
1.862
1.438
100.00
0.001
0 2.47E-03 0.175 0.247 0.175
1.897
1.403
100.00
0.001
0 2.83E-03 0.2 0.283 0.200
1.933
1.367
100.00
0.001
0 3.18E-03 0.225 0.318 0.225
1.968
1.332
100.00
0.001
0 3.54E-03 0.25 0.354 0.250
2.004
1.297
100.00
0.001
0 3.89E-03 0.275 0.389 0.275
2.039
1.261
100.00
0.001
0 4.24E-03 0.3 0.424 0.300
2.074
1.226
100.00
0.001
0 4.60E-03 0.325 0.460 0.325
2.110
1.190
100.00
0.001
0 4.95E-03 0.35 0.495 0.350
2.145
1.155
100.00
0.001
0 5.30E-03 0.375 0.530 0.375
2.180
1.120
100.00
0.001
0 5.66E-03 0.4 0.566 0.400
2.216
1.084
100.00
0.001
0 6.01E-03 0.425 0.601 0.425
2.251
1.049
100.00
0.001
0 6.36E-03 0.45 0.636 0.450
2.286
1.014
100.00
0.001
0 6.72E-03 0.475 0.672 0.475
2.322
0.978
100.00
0.001
0 7.07E-03 0.5 0.707 0.500
2.357
0.943
100.00
0.001
0 7.42E-03 0.525 0.742 0.525
2.392
0.908
100.00
0.001
0 7.78E-03 0.55 0.778 0.550
2.428
0.872
100.00
0.001
0 8.13E-03 0.575 0.813 0.575
2.463
0.837
100.00
0.001
0 8.48E-03 0.6 0.848 0.600
2.498
0.802
100.00
0.001
0 8.84E-03 0.625 0.884 0.625
2.534
0.766
100.00
0.001
0 9.19E-03 0.65 0.919 0.650
2.569
0.731
100.00
0.001
0 9.54E-03 0.675 0.954 0.675
2.604
0.696
100.00
0.001
0 9.90E-03 0.7 0.990 0.700
2.640
0.660
100.00
Diff Amp CT
Gain
gain
0.250
0.354
1.000
0.500
0.707
1.000
0.750
1.061
1.000
1.000
1.414
1.000
1.250
1.768
1.000
1.500
2.121
1.000
1.750
2.475
1.000
2.000
2.828
1.000
2.250
3.182
1.000
2.500
3.535
1.000
2.750
3.889
1.000
3.000
4.242
1.000
3.250
4.596
1.000
3.500
4.949
1.000
3.750
5.303
1.000
4.000
5.656
1.000
4.250
6.010
1.000
4.500
6.363
1.000
4.750
6.717
1.000
5.000
7.070
1.000
5.250
7.424
1.000
5.500
7.777
1.000
5.750
8.131
1.000
6.000
8.484
1.000
6.250
8.838
1.000
6.500
9.191
1.000
6.750
9.545
1.000
7.000
9.898
1.000
Current Diff
Amp Gain
Iout
Rms
0.0033112
58
4.545455 Vrms
6.4272733
Io,Pk
7V
CT Ratio
0.001
0.0064272
Isense ,pK
73
0.0045454
V
at ADC
= Vfb +1.65 (for 55
+Ve
Isense
,rms
Cycle)
V at ADC = Vfb -1.65 (for -Ve
Cycle)
Output Current Sense Calculations

48
Design of Inverter- IGBT Driver
12V Supply
15V Fly- Back

Power Supply
Isolated 15V
Supply
3.3V level PWM

from
Microcontroller
Optical Isolator
(HCPL-350)
Isolated 15V
level PWM
IGBT Driver Module Block Diagram
49
Design of Inverter Firmware-Modes
Inverter Firmware- Working Modes

50
Design of Inverter Firmware
There are 5 different running modes of the system implemented in the

firmware.
1 Power On Mode:
When the board powered up, it will get into the power on mode first, the
MCU will initialize itself. When the initialization is finished, the system will
transfer to standby mode automatically.
2 Standby Mode:
When the system is in standby mode, all the PWM and Relay are off. The
system is waiting for the command to turn on. Besides, it will detect if the fault
occurs.
51
Design of Inverter Firmware

3 Soft Start Mode:
When there is a turning on command, the system will go to the soft start mode
first, the PWM and relay will be turned on. When the turning on is OK and no
fault occurs, the system will get into the normal inverter mode
automatically.
4 Normal Inverter Mode:
When the system is in normal inverter mode, it means the system is feeding the
energy out. If there is no fault or turnoff command, the system will stay in this
mode.
5 Fault Mode:
When there is a fault, for example bus over voltage, the system will transfer to
the fault mode immediately. All the PWM is off, the output relay is cut off from
the output. The fault can be cleared by the button. When the fault is cleared, it
will return to standby mode.
52
Power ON Mode
Standby Mode
Soft Start Mode
Normal Inverter Mode
Fault Mode
1 : Switch Off all PWM()

2 : Switch OFF the output Relay()
3 : Reset All the Flag()
4 : Go to Stand By mode()
5 : Check the Fault Flag()
6 : IF Fault Flag is set()
7 : If all the parmaeter are ok got Soft start mode()
8 : check the Fault and error condition()
9 : Check if the input voltage is Proper()
10 : Switch On the outpur relay()
11 : Switch ON the PWM()

12 : Go to Normal inverting Mode()
13 : Check for proper input voltage from DC bus and Fault flag()
14 : Switch OFF the PWM and Go to Fualt mode any of the condition fails()
15 : Check if the Clear fault Flag occur()

16 : Go to stand by mode if the fault flag gets clear()
17 : Again Start from step 5()
Inverter Output Voltage Waveform is clean 220V(High voltage

probe is attenuated to 500x).
54
System Output Voltage and Current Waveforms Show PF=0.99,

load connected to the system is a typical Switched Mode Lab
Power Supply
55
Inverter Efficiency Curve-Load Sweep
Inverter Output load(Watts) Vs Efficiency Curve

56
AVR System Efficiency at Extreme Inputs
System Output % load(Watts) Vs Efficiency Curve at

extreme Input Voltages
57
AVR System Efficiency at Typical Inputs
System Output % load(Watts) Vs Efficiency Curve

at typical input voltages
58
Conclusion
Designed and demonstrated AVR system with satisfactory results.

AVR system has following advantages compared to existing solutions
presented.
Provides active power factor correction, helps deliver maximum power

with less THD to the connected loads.
Eliminates need for power factor correction on individual loads.
Operates from wide input voltage range(85VAC to 265VAC), works in all
geographic regions.
Compliant to EN61000-3-2 standard, low harmonics on AC input line.
Saves electricity usage charges.
High safety features including under voltage, over voltage, over current,
over current.
High efficiency, >93% at full load.
Provides clean sine wave @220V+/-1%
59
Future Scope of the Project
Both PFC and Inverter boards along with PSUs, IGBT drivers, Control
card can be combined into a single PCB.
With single PCB architecture, one common heatsink can be used and all
heat dissipating components can be attached to it. This helps miniaturize
system size.
PFC controller functionality also can be implemented in the same
microcontroller which is used in inverter board as it has enough
peripherals and memory to accomplish the job.
60
Project Schedule
61
References
1. Kuo- Kai Shyu, Ming-Ji Yang, Jing-Heng Hong and Bau- Hung
Lin(2004), Automatic Voltage Regulator Using a Novel Phase
Shifted PWM Single- Phase Inverter Annual Conference
IEEE, RIYE Electric CO and the National Science Council of
Taiwan, Busan Korea.
2. Dong-Hee Lee, Jin-Woo Ahn, and Tae-Won Chun(2007), A
Variable Gain Control Scheme of Digital Automatic Voltage
Regulator for AC Generator, Dept. of EE & Mechatronics,
Kyungsung University, Busan, Korea.
3. Hamdy Ahmed Ashour, (2005), A New Electronic StepUp/Down Voltage Stabilizer Topology Based On H- Bridge AC
Chopper, Arab Academy for Science and Technology, Dept of
Electrical and Control Engineering, Miami, Alexandria, Egypt.
62
References
continued
4. Jinn-Chang Wu(2011), Three-Arm AC Automatic Voltage

Regulator, IEEE TRANSACTIONS ON INDUSTRIAL
ELECTRONICS.
5. Nang Kaythi Hlaing, LwinLwin(2010), Microcontroller-Based
Single-Phase Automatic Voltage Regulator, Hardware
Technology Department Computer University(PangLong) .
6. Chin-Yuan Hsu(2011), The Design and Implementation of
LLC Resonant Half-bridge Converter with Natural Interleaved
Power-Factor-Correction,Departmentof Electrical Engineering
National Kaohsiung University of Applied Sciences,
Kaohsiung, Taiwan.
7. Yong-Seong Roh(2012), A Two-Phase Interleaved Power
Factor Correction Boost Converter with a Variation-Tolerant
Phase Shifting Technique, Member, IEEE.
63
References
continued
8. A. R. Prasad(1991), An Active Power Factor Correction

Technique for Three-phase Diode Rectifiers, Member, IEEE,
IEEE transactions on Power Electronics, Vol 6, No 1.
9.
Anitha. U, Sampath kumar Boini(2012), AC to DC
conversion using active PFC, Department of Electrical And
Electronics Engineering, JNTU, HYD, INDIA, Vol.2, Issue.6.
10. Jong C. Wang, Hon-Ji.Chen (2008), Design and Analysis of
AC/DC Converters with Interleaved Power Factor Correction,
Department of Electronic Engineering, University of Yuan Ze.
11. Jong-Hyun Kim (1998), A PWM BuckBoost AC Chopper
Solvingthe Commutation Problem, IEEE transactions on
industrial electronics, vol 45, no.5.
64
Thank You
65

Vijay FPP ESD PT11

Încărcat de

Informații document

Titlu original

Drepturi de autor

Formate disponibile

Partajați acest document

Partajați sau inserați document

Opțiuni de partajare

Vi se pare util acest document?

Este necorespunzător acest conținut?

Drepturi de autor:

Formate disponibile

Vijay FPP ESD PT11

Încărcat de

Drepturi de autor:

Formate disponibile

Final Project Presentation

Design and Development of Power Factor

Academic Guide : Mr. Ugra Mohan Roy

M.S.Ramaiah School of Advanced Studies

Aim and Objectives of the Project

M.S.Ramaiah School of Advanced Studies

Aim and Objectives of the Project

Methods and Methodology

Methods and Methodology

Methods and Methodology

M.S.Ramaiah School of Advanced Studies

With the development in advanced power semiconductor devices, more

M.S.Ramaiah School of Advanced Studies

Need Analysis for PFC in Regulators

Need Analysis for PFC in Regulators

Need Analysis for PFC in Regulators

Need Analysis for PFC in Regulators

M.S.Ramaiah School of Advanced Studies

M.S.Ramaiah School of Advanced Studies

Literature Review continued..

M.S.Ramaiah School of Advanced Studies

Literature Review continued..

Application Diagram of AVR

Usage of AVR in day to day applications

Block Diagram of AVR

High level block diagram

AVR System Specs

AC Input Voltage Range

85 - 265VAC, Single Phase

Input under/over voltage protection

M.S.Ramaiah School of Advanced Studies

Power Factor- Explanation

Power Factor- Explanation Contd

Active or Passive PFC

M.S.Ramaiah School of Advanced Studies

Active PFC or Passive PFC Contd

M.S.Ramaiah School of Advanced Studies

Conventional Vs Interleaved PFC

Conventional Active Interleaved Active

Advantages of Interleaved PFC

M.S.Ramaiah School of Advanced Studies

M.S.Ramaiah School of Advanced Studies

Interleaved PFC Block Diagram

M.S.Ramaiah School of Advanced Studies

Interleaved PFC Design Specs

The Interleaved uses the UCC28070 PFC interleaved controller to shape

M.S.Ramaiah School of Advanced Studies

Interleaved PFC-Design Inputs

Dmax=Max duty cycle

Vin-min= minimum AC input

Dmin-LL= Minimum duty cycle

PFC Design Input Parameters

Interleaved PFC- Design Calculations

Boost Inductors (L)

( Vin-min* sqrt(2)*Dmin-LL)/(del IL *fs)

Interleaved PFC Switching

Switching Waveforms of Interleaved MOSFETs

M.S.Ramaiah School of Advanced Studies

AVR System Test Setup

AVR System Test Setup

AVR System Boards

AVR System Boards

PFC- Prototype Efficiency at Extreme Input

( Vin-min* sqrt(2)Dmin-LL)/(del IL fs)