Sunteți pe pagina 1din 25

MICROPROCESSORS

ADDRESSING MODES
Micro 133: Microprocessor Systems
Prelim Lecture 4
by: Engr. Ricrey E. Marquez, CpE, MSCS

INTRODUCTION TO ADDRESSING
MODES
MICROPROCESSORS ADDRESSING MODES

Addressing Modes

It refer to a set, of the number of ways, in which the data used by a


program can be accessed by a CPU.

The number of ways of accessing data depends on the type of data


and the logical location of the data.

In high-level languages the name of a variable is sufficient


information needed to access the data, assigned to the variables
name.

Using DEBUG the assembly language programmer needs


to choose the most appropriate addressing mode, in order
to access data at a known address.

INTRODUCTION TO ADDRESSING
MODES
MICROPROCESSORS ADDRESSING MODES

Accessing data in high-level language such C, C++, or Pascal

Accessing data in DEBUG or Assembly

C = A + B

MOV
MOV
ADD
MOV

AX,[0200] ;the A value


BX, [0202]
;the B value
AX, BX ; A + B
[0300], AX
;store result at C

Choice of addressing mode used depends upon the type of data being
accessed.

A constant,
A variable piece of information or
An item within an array of data.

8088/8086 INSTRUCTION SYNTAX


MICROPROCESSORS ADDRESSING MODES

Intel family supports four addressing modes (in general)

Modes differ in the location data and address calculations

All nodes involves physical address generation

8086 Instruction Syntax

Lines

of code

Label: Instruction

Instruction

Opcode
Mnemonic

;Comment/s

[operand 1], [operand 2]


Destination
Source

8088/8086 INSTRUCTION SYNTAX


MICROPROCESSORS ADDRESSING MODES

Operands
These

data.

Opcode (Operation code)


This

are destination address and source address of

tells the microprocessor which operation to perform

The way in which these addresses are specified is


named the addressing mode for the source and
destination address.
operand is to the right
Destination operand is to the left
Source

TYPES OF PS ADDRESSING
MODES
MICROPROCESSORS ADDRESSING MODES

Data Addressing Modes

Memory Addressing Modes

Direct Addressing Mode (Variable)


Register Indirect Addressing Mode (Arrays)
Base-plus-Index Addressing Mode (Complex Array)
Register Relative Addressing Mode (Complex Array)
Base-Relative-plus-Index Addressing Mode (More Complex Array)
Scaled-index Addressing Mode (More Complex Array for 32 bit)

Program Memory Addressing Modes

Register Addressing Mode (General)


Immediate Addressing Mode (Constant)

Direct Program Memory Addressing Mode


Register Indirect Program Memory Addressing Mode
Memory Indirect Program Memory Addressing Mode
Relative Program Memory Addressing Mode (Conditional)

Stack Memory Addressing Modes

DATA ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Register Addressing Mode (General)


It

uses the name of a register to identify the location of data the


data is held in the register.
Copy the content source register to a destination register
8 Working Registers AX, BX, CX, DX, SI, DI, BP, SP 16 bit wide.
Four of the registers AX, BX, CX, DX can be thought of as single
16 bit registers or dual 8 bit registers.
Length of the registers must match
MOV AX, CX
MOV BL, CL
MOV AL, SI ;ILLEGAL
MOV AX, CH ;ILLEGAL
MOV DS, AX
MOV CS, AX ;ILLEGAL

DATA ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Immediate Addressing Mode (Constant)

Transfer data (constant) to into a destination register


Value moved into a register (from instruction)
Most instructions assume that the operands of an instruction are the address of the
data involved, not the data itself.
The exception to this rule is the immediate addressing mode, where the actual data
number is specified in the instruction and is hard coded as part of the instruction
(source operand).
ITEM1 EQU
0F3H
ITEM2 EQU
01110101000010B
ITEM3 EQU
0D
START:
MOV
AX, ITEM1
MOV
BL, 87D
MOV
CH, ITEM2
; ILLEGAL
MOV
0CDH, BL ; ILLEGAL
MOV
ITEM2, AL
; ILLEGAL

Note: EQU directive assigns names to constant numbers and does not save memory space

SOME SYMBOLS USED IN


ADDRESSING MODE
MICROPROCESSORS ADDRESSING MODES

Labels - These are names given to an address of an opcode in code memory


Constants - These are names assigned to absolutely constant numbers, hard coded into
instructions
Variables

These are names of an address in memory


However, a program reference to the variable name, as an operand, will use the contents of address

LOOPHERE: MOV AX,BX

JMP LOOPHERE
CON1 EQU
0ABCDH

MOV AX,CON1
VAR1 DW
0ABCDH

MOV AX,VAR1
MOV VAR1,BX

MEMORY ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Accessing data that is in memory is done by specifying


the address of the data.

Address is actually the offset of the data relative to the base


of the data segment.

This mode is invoked when the operand is placed in


square brackets [xxxx].
Direct Memory Addressing Mode (Variable)

Move byte or word between memory location and a register


Memory address appears in the instructions instead of data
Data accessed from a location in memory
[xxxx] is a fixed address number

MEMORY ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Examples of Direct Addressing Modes


MOV [1234H], AX ;MOVE CONTENT OF AX TO
;DS:1234H; NOT ;SUPPORTED!

VAR1 DW ?
VAR2 DB 0FFH
MOV VAR1,1234H ;MOVE NUMBER 1234H TO
;VARIABLE VAR1
MOV [VAR1],AX
MOV VAR1+1,1234H
MOV WORD PTR [VAR1+1],1234H
MOV BYTE PTR [VAR1],12H
MOV VAR2,1234H
MOV AH,VAR2

MEMORY ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Register Indirect Addressing Mode (Arrays)

Transfer data between a register and a memory location


address by a register
Sometimes need using the special assembler directives
when size is not clear such as BYTE PTR, WORD
PTR, DWORD PTR.

VAR1 DD

12345678H

VAR2 DD

9ABCDEF0H

SUM DD

;MOVE LOW WORD OF VAR1 TO AX


START:

MOV AX, WORD PTR [VAR1]

;MOVE LOW WORD OF VAR2 TO BX


MOV BX, WORD PTR [VAR2]

MEMORY ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

MOV CX, WORD PTR [VAR1+2]


;MOVE LOW WORD OF VAR1 TO AX
MOV DX, WORD PTR [VAR2+2]
;ADD THE LOW WORDS
ADD AX, BX
;ADD THE HIGH WORDS
ADC CX, DX
;MOVE LOW WORD OF RESULT TO LOW WORD
;OF SUM
MOV WORD PTR [SUM], AX
;MOVE HIGH WORD OF RESULT TO HIGH
;WORD OF SUM
MOV WORD PTR [SUM+2], CX
RET

MEMORY ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Base-plus-Index

(Complex Array)

Addressing

Transfer

Mode

data between a register and a


memory location addressed by base register
and index register

MOV [BX+SI],AX
MOV DX,[BX+DI]

MEMORY ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Register

Relative Addressing
Mode (Complex Array)
Move

data between a register and a


memory location addressed by specified
register plus displacement (offset)
MOV AX,[BX+4]
MOV BX,[SP+3]

MEMORY ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Base-Relative-plus-Index

Addressing
Mode (More Complex Array)
Transfer

data between a register and a


memory location addressed by base and index
register plus displacement
MOV [BX+SI+2],AX
MOV DX,[BX+DI+4]

MEMORY ADDRESSING MODES


MICROPROCESSORS ADDRESSING MODES

Scaled-index Addressing Mode (More


Complex Array for 32 bit)
The

address in the second register is modified by


scale factor
Scale factor are 1, 2, 4, or 8 for word, double word, or
quad-word access respectively.
Only available in 80386 and above microprocessor (32
bit)
MOV [EBX+2*ECX], AX
MOV EAX, [EBP+8*ECX]

PROGRAM MEMORY ADDRESSING


MODES
MICROPROCESSORS ADDRESSING MODES

The flow of a program can be controlled through


the use of different branching instructions
Different addressing modes are also used here to
direct the CPU to various locations of program
code

Direct Program Memory Addressing Mode


Jump

to a location specified by a constant

JMP 0E001h ;JUMPS DIRECTLY TO CS:E001H

PROGRAM MEMORY ADDRESSING


MODES
MICROPROCESSORS ADDRESSING MODES

Register Indirect Program Memory Addressing


Mode
Jump

to a location specified by the contents of a register

JMP BX ;Jumps to the address contained in BX

Memory Indirect Program Memory Addressing


Mode
Jump

to a location given by the contents of two memory


locations pointed at by a register
JMP [DI]

;REPLACES IP WITH THE CONTENTS OF THE


;MEMORY LOCATIONS POINTED
;AT BY DI AND DI + 1

PROGRAM MEMORY ADDRESSING


MODES
MICROPROCESSORS ADDRESSING MODES

Relative Program Memory Addressing Mode


(Conditional)
Jump

according to some condition to a memory


location that is within 128 or +127 bytes of the
current location
JE(JZ)
;JUMP IF EQUAL/ZERO (Z = 1)
JNE(JNZ)
;JUMP IF NOT EQUAL/ZERO (Z = 0)
JB(JNAE)
;JUMP IF BELOW (C = 1)
JAE(JNB)
;JUMP IF EQUAL OR ABOVE (C = 0)
JS
;JUMP IF SIGN FLAG SET (S = 1)
JNS
;JUMP IF SIGN FLAG NOT SET (S = 0)
JCXZ
;JUMP IF CX IS ZERO (CX = 0)

STACK MEMORY ADDRESSING


MICROPROCESSORS ADDRESSING MODES

Stack is LIFO (Last In, First Out) in the memory


Data are place by PUSH and removed by POP
instruction

Stack memory is maintained by stack segment (SS) and


stack pointer (SP) SS:SP

When a word is pushed, high 8-bits are stored at SP-1


and low 8-bits are stored at SP-2, then SP is decremented
by 2

When a word is poped, low 8-bits are removed from the


location SP and high 8-bits are removed from the location
address by SP+1, at SP-2, then SP is incremented by 2

STACK MEMORY ADDRESSING


MICROPROCESSORS ADDRESSING MODES

Figure 1 PUSH BX - place the contents of BX onto a stack

STACK MEMORY ADDRESSING


MICROPROCESSORS ADDRESSING MODES

Figure 2 POP CX removed data from the stack and


place them into CX

CALLING SUBROUTINES
MICROPROCESSORS ADDRESSING MODES

Normally a complete program is written as a set of subroutines


To execute a subroutine a CALL instruction is used
CALL is similar to a procedure call in a high-level language

executed it pushes IP and the return segment (for FAR calls) onto the stack, then
executes a jump to the call address

When

Two types of CALLs can be executed


CALL

to a NEAR address Only Offset (IP) specified, segment assumed to be the same
CALL to a FAR address New Segment and Offset (IP) specified

CALL subroutine is terminated with a RET instruction


RET

(RETurn) instruction causes the CPU to pop the RETURN address off the stack (IP
or Segment and IP) and execute a jump back to it
CALL 0200
CALL 1029:0200

FAR VS NEAR SUBROUTINE


DIRECTIVES
MICROPROCESSORS ADDRESSING MODES

If the subroutine is situated in the same segment


as the routine that it has been called from, then
the subroutine is considered to be NEAR.
If the subroutine is not situated in the same
segment as the routine that it has been called
from, then the subroutine is considered to be
FAR.
Jump

to a location out of the current code segment,


meaning that not only IP but also CS is replaced with
new values

S-ar putea să vă placă și