TCSC

XL= 10

200 2 Sint
i

Xc=2.5

Thyristor switched series capacitor TSSC

Discrete control TSSC

On/ Off
control

XTSSC = Zero when thyristor are conducting

Thyristor switched series capacitor TSSC

Discrete control TSSC

On/ Off
control

XTSSC = Zero when thyristor are conducting

Continuous control mode TCSC

+jXL

-jXc
XTCSC =

-jXc. jXL()
jXL() -jXc

-jXc
[1 - Xc / XL()]

1.If |XL() | < |Xc | Then XTCSC Inductive

2.If |XL() | = |Xc | Then XTCSC is infinite resonant
condition
3.If |XL() | > |Xc | Then XTCSC capacitive

TCSC
Continuous
pow ergui

[ILine]
+

Goto1

i
-

Current Measurement

[Icap]

i
-

AC Voltage Source

VC

Goto

50 ohmsh1

[Itcr]
+

i
-

Goto2

Current Measurement2

Thyristor

Pulse
Generator
Transport
Delay

Subsystem

[Vc]

Goto3

Current Measurement1

100 ohms

+
v
-

Thyristor1

100 ohms1

TCSC Thyristor blocked mode

X TCSC jX C
Line currentj
cap voltage
X
c

200
150
100
50
0
-50
-100
-150
-200
0.15

0.155

0.16

0.165

0.17

0.175
Time

0.18

0.185

0.19

0.195

0.2

TCSC bypass mode

Thyristor fully conducting

X TCSC

TCR

jX L X C

X L XC

200

j
X
c

Line current
cap voltage
TCR current

150
100
50
0
-50
-100
-150
-200
0.15

0.155

0.16

0.165

0.17

0.175
Time

0.18

0.185

0.19

0.195

0.2

TCSC Varnier mode

jX L ( ) X C
X TCSC
X L ( ) X C
Line current
cap current
TCR current
Capacitor Voltage

5000
4000
3000
2000
1000
0
-1000

-2000
-3000
-4000
-5000
0.27

0.275

0.28

0.285

0.29

0.295

TCSCvarnier operation
5

1.5

x 10

ILine
Icap
Itcr
Vcap

0.5

-0.5

-1

-1.5
1.96

1.965

1.97

1.975

1.98
Time

1.985

1.99

1.995

TCSC Varnier Mode

5

x 10

Line current
cap current
TCR current
cap voltage

1.5
1
0.5
0
-0.5
-1
-1.5
-2
1.975

1.98

1.985

1.99

1.995

TCSC Ch

XLmax
XLmin

Bypass
mode

Xcmax

Xmin

X TCSC

Inductive
region

jX L ( ) X C

X L ( ) X C

Resonance condition ,
forbidden zone

XTCSC

Delay angle is
measured from
capacitor voltage max
position i.e Line
current negative zero
crossing

90

capacitive

Blocked
mode
1/ C

TCSC reactance ch

Three basic operating modes

1. Thyristor blocked
XTCSC = -jXc
2. Thyristor (fully conducting)
bypassed
XTCSC = -jXc XL / [XL- Xc]
3. Varnier mode
XTCSC = -jXc XL() / [XL() - Xc]

+jXL

-jXc
+jXL

jXc
+jXL

-jXc

+jXL

Thyristor Blocked
-jXc
Thyristor Blocked
When the thyristor valve is not triggered and the thyristors
are kept in the non_conducting state the TCSC is operating
in blocking mode.
The TCSCs net reactance is then simply the capacitive
reactance of the internal capacitor,
XTCSC = jXC
This mode occurs when the firing angle is 90o.(refered to
peak of capacitor voltage)
In this mode the TCSC performs like a fixed series
capacitor.
no current passes through the thyristors, hence Iline = ITCSC
and ITCR = 0 .

+jXL

.=0

TCSC
Thyristor bypassed
-jXc
If the thyristor valve is triggered continuously the valve
stays conducting all the time and the TCSC behaves as a
parallel connection of the series capacitor bank with the
TCR inductor.
Hence, the net TCSC reactance is + j(XC // XL ) and this
mode occurs when the firing angle is 0o as
shows the flow of current under this mode. Depending on
the design of the TCSC, most of the line current flows
through the TCR branch and hence
Iline ITCR and IC 0 .

+jXL

TCSC operation
-jXc

Vernier operation
This is the most common mode of operation.
If a trigger pulse is supplied to the thyristor having forward bias
voltage just before the capacitor voltage reaches zero, a capacitor
discharge current pulse will circulate through the parallel inductive
branch.
This discharge current pulse adds to the line current through the
capacitor bank. The current pulse causes a component of voltage
across the TCSCs capacitor that adds to the voltage caused by the line
current. The capacitor peak voltage thus will be increased in
proportion to the charge that passes through the TCR branch.
The fundamental voltage also increases almost proportionally to that
charge.
XTCSC -jXc XL() / [XL() - Xc]

TCSC Operating Principle

Line current

Capacitor
voltage

TCR
current

TCSC Operating Principle

Line current
Voltage
Boost

TCR
current

Capacitor
voltage

TCSC reactance order

The Reactance Order

The reactance order ( XORDER ) (also known as the boost
factor ) of the TCSC is defined as the ratio of its capacitive
reactance to the capacitive reactance of its internal capacitor
;
XORDER ==XTCSC /XC
Hence, when the TCSC is operating in blocked mode (XTCSC
= XC ) , then from eqn.
XORDER = XORDERmin =1 ;

when the firing angle is min, XTCSC = XTCSCmax and

hence XORDER = XORDERmax . One of the limiting factors of
XORDERmax is the resonant region .

TCSC reactance
ratio

X TCSC
XC

2 2 2 cos 2
sin 2
1
(

tan

tan

2 1 2 1
2
X TCSC
2 2 2 cos 2
sin 2
{X C X C
(

tan

tan

2 1 2 1
2

Capacitorvoltage and TCR current contains

odd harmonics of the order n=2k+/-1

Internal control scheme of the

TCSC
Xorder
Xorder
Firing
Angle

ILine abc

PLL

Comp

Synchronizing
circuit

Gate
pulse
Gen

TCSC control
The function of the internal control scheme of the TCSC is
to provide appropriate gate drive for the Thyristors to
produce the compensating reactance (or reactance order
XORDER ) defined by a reference input.
Synchronous timing is done by using a Phase-Locked Loop
(PLL) that tracks the positive sequence component of the
line currents.
The firing angle is measured from the zero crossing the line
currents.

TCSC

The PLL tracks the line current phasor to give

The main reason for using the line currents for synchronisation is because
the TCSC voltage gets distorted by harmonics caused by the TCR pulses
The second function of the internal control scheme is the TCSC reactance
order XORDER to firing angle conversion, which is achieved by using
eqns

X TCSC
ratio
XC
2 2 2 cos 2
sin 2
1
( tan tan )
2

2
1 1
2

The third function is the generation of suitable turn-on and turn-off

pulses for the thyristors using the tracking angle from the PLL and the
firing angle .

TCSC
Illustrative Example
TCSC_Analysis_ppt34.mdl

SSR
TCSC for SSR damping

SMIB system -SSR

XT

RTL

XTL

XC

Infinite
Bus
Exciter
Turbine

Generator
A single machine infinite bus system with the series
capacitor compensated transmission line shown will
have a resonance frequency given by

fe fo

XC
XC
fo
''
X X T X TL
X total

The IEEE definition of

subsynchronous oscillation

: Subsynchronous oscillation is an electric

power system condition where the electric
network exchanges significant energy with a
turbine-generator at one or more of the
natural frequencies of the combined system
below the synchronous frequency of the
system following a disturbance from
equilibrium.

SSR Cause & Effect

Since the turbine-generator unit is radially
connected to the power system via a series
compensated line, any disturbance can cause
the turbine-generator shaft to oscillate at one or
more of its modes of torsional oscillations.
These oscillations can produce peak torques
that may be many times higher than the normal
rated torques in the shaft sections and may
eventually damage the shaft.

SSR Detection
The voltage across the series capacitor is
a combination of fundamental
frequency, DC and subsynchronous
frequency components.
Fundamental

-jXc

Voltage
across
capacitor

T/2
>T/2
>T/2
Unequal Positive & negative half cycle
periods of capacitor voltage.

Capacitor Voltage
Subsynchronous
component

Fundamental
component

T/2
>T/2

The voltage across the series capacitor is a

combination of fundamental frequency, DC
and subsynchronous frequency components.

Combined
component
>T/2

NGH SSR Damper

R

-jXc
NGH damper is basically a thyristor controlled
discharge resistor ( in series with the di/dt limiting
reactor ) operated synchronously with the power system
frequency in the region near the end of the half cycle
on the capacitor voltage.
Prevents the oscillation buildup since the capacitor
voltage cannot respond naturally to sub synchronous
line current.

GTO Controlled series capacitor GCSC

GCSC.pptx
Varner control of capacitor insertion
GTO

Capacitor is short circuited when GTO conducts

XGCSC = is a function of the conduction angle of GTO
XGCSC = Zero when GTO are conducting for full cycle

GCSC
Objective of the GCSC scheme is to control the ac voltage
Vc across the capacitor at a given line current i.
For controlling the capacitor voltage , the closing and
opening of the GTO valve is carried out in each half cycle
in synchronism with the ac system frequency. The GTO
valve is stipulated to close automatically (through
appropriate control action) whenever the capacitor voltage
crosses zero.
Turn off delay angle is measured wrt to the peak of line
current.
Function is to convert input reference into a proper
switching instants which results in desired valve
conduction and blocking intervals.
A small turnoff delay will prevent SSR buildup.

GCSC Operating Principle

Line current

Turn on
Pulses
Turnoff
pulses
Voltage
across
cap Vc
GTO
condu
ction

Vc

i Line

Capacitor
voltage

current
Synchronuous
Timing control
(PLL)
Voltage to
turnoff delay
angle converter
Vc()= kF()

GCSC control

Capacitor voltage
sensing and
processing
GTO

Gate drive
circuit

1.Syn timing ckt runs in synchronism with line current

2Reactive voltage or impedance to turnoff delay angle
computation
3. Determine the instant of volt turn on ( when Vc reaches
zero)
4. Generation of suitable turn off and turn on pulses for GTO
valves

GCSC Operating Principle

Line current

Turn on
Pulses
Turnoff
pulses
Voltage
across
cap Vc
GTO
condu
ction

SSSC
Static synchronous series
compensator

Static synchronous series compensator

Vpq
Vpq

ILine

ILine
Pref

VSC

Controller
Qref

Static synchronous series compensator

Vpq

Vpq

Q
Pref
VSC

Contro
Qref
ller
Compensator power
Ssssc = Vpq x Iline*
Psssc= Vpq ILine Cos
Qsssc = Vpq ILine sin
Compensator power rating
Ssssc= Vpqmax Iline max

ILine

Static synchronous series compensator

Vpq
Vpq

ILine
Pref

VSC

Controller
Qref

Compensator rating
Ssssc = Vpq x Iline*
Psssc= Vpq ILine Cos
Qsssc = Vpq ILine sin

Ex: Vpq=4kV
=70 degree
Iline=600 A
P=4000 x 600 x0.342
=0.8208 MW
Q=4000 x 600 x0.9396
=2.255040 MVAR

Simple Two M/c model

Vpq

X/2

VL
XL

Is

Vsef
f

Vs

V
s
Vpq

I
r

Vpq

Vseff

Vseff
Vr
I

Vpq series injected

voltage

V
r

IX drop

Vs

Vs sending end voltage

Vs
I

Static synchronous series compensator

Vpq
i
P

VSC

Vq

(Xq)

PI

V
Voltage &
current
signal
Processor

Pref
Qref

Controller

Transient
stability
enhancement

Vq

Power
oscillation
damping

SSR
damping

Summary of characteristics and

features of SSSC
SSSC is a voltage source type and
TSSC,TCSC and GCSC are variable
impedance type series compensator
Essential differences in characteristics &
features
1.SSSC is a voltage source type compensator
injecting |Vpq| /_ in series with the line.

 1. Capable of internally generating

controllable compensating voltage over an
ideal capacitive or inductive range
independent of the magnitude of line
current.
Vpq is independent of line current where as
the compensating of GCSC or TCSC is
proportional to line current

 2 SSSC also provides compensartor for line

resistence by injection of real power .
Sssc can compensate both line reactance & line
resistance altering X/R
TCSC ,GCSC can only provide reactive
compensation & hence no control of X/R.

 SSSC with energy storage :

Provides more effective power oscillation
damping; quickly modulates series reactance to
increase or decrease transmitted power,
Can absorb or inject real power in the line in
synpathy with the m/c swing.
TCSC & GCSC can only control transmitted
power

 4. SSSC uses GTO which presently are

available with lower rating than Thyristors.
Hence external overvoltage protection is
necessary.
MOV

GTO

5
.TSSC ,TCSC & GCSC are installed on a
high voltage platform, control and cooling
system installed on the ground with high
voltage insulation.
SSSC requires coupling transformer rated for
0.5pu of total series var compensator & a dc
capacitor.
Has higher losses compared to TCSC.

6
With zero compensation current flows
through switches & thus contribute to losses
at rated current , these losses could be 0.5 %
of rated Var output for TSSC & TCSC, 0.7
to 0.9% for GCSC & SSSC

SSSC
Vpq
Vpq
Vseff

ILine
Vseff

Vs

Vs

Pref
ILin
e

VSC

Qref

SSSC
Vseff

Vseff

Vpq

sin

V
1

V 2 pq 2VsV pq cos(180 )

V pq sin(180 )
Vseff

Vs

ILine

Pcomp V pq I Line cos( )

Qcomp V pq I Line sin( )

SSSC operating modes/

Applications

1 dynamic voltage regulator

2. qudrature voltage booster (PST)
3. pure Phase Shifter
4. Line impedance compensator
5. active and reactive power flow controller
6. Transient stability enhancer
7. Power oscillation damper
8. Line X/R control
9. Voltage harmonic filter
10 short circuit current limiter.
11 power quality conditioner.

1.Dynamic voltage regulator

Vpq=+V

Vseff

Vseff Vs V
Vseff Vs V pq

0
V pq V

Vs
Vpq = V

2.Quadrature booster
Vpq
Vs

Vseff

tan

V pq
Vs

V pq Vs tan

3.Pure phase shifter

|Vseff|=|Vs|

2 sin

Vpq

Vs

V pq
1

2Vs
V pq 2Vs sin( / 2)

Vsef
f

180 (90 ) 90
2
2

/2

/2

SSSC as 4. Line Reactance

compensator
Vpq is in quadrature with Line
current

Vpq

Vseff

Vpq

Vs

ILine

seff

2VsVseff cos( )

= 90-
Vseff

sin

V
1

V 2 pq 2VsV pq cos(180 )

V pq sin(180 )
Vseff

5.SSSC as active and reactive

power flow controller
Vseff

Vseff

Vpq

sin

Vs

Vpq
ILine

V
1

V 2 pq 2VsV pq cos(180 )

V pq sin(180 )

Vseff
2

seff

2VsVseff cos( )

180 sin

Vseff Vr
X

Vseff sin
V pq

sin( )

5.SSSC as active and reactive power

flow controller
Vseff

Vseff

V 2 pq 2VsV pq cos(180 )

Vpq

sin

V pq sin(180 )
Vseff

Vs

V
r

Vseff Vr

2
Vseff

sin( )

Vseff Vr
X

cos( )

SSSC
Vpq

Vpq
Vsef
f

Vs

ILine
Vseff

V
s
ILin
e

Pref

VSC

Qref

500A , 30o

SSSC

Z1=30+j4
0
500A, 30o

Vs
Vs

Z2=40 +j30

Vs
Vr1

ILine

Vr1

Vs
Vr1

Vr2

Vr2

ILine

ILine

Vr2

500A , 30o

SSSC

Z1=30+j4
0
Vs
200 kV, 0o

500A, 30o Vr2

Z2=40 +j30

Vs
Vr1
Vr2
ILine

Vr1= Vs+ ILine1*Z1 ; phasor

addition
Vr2= Vs+ ILine2*Z2 ; phasor
addition

Vr1

500A , 30o

SSSC

Vr1

Z1=30+j4
0
Vs
200 kV, 0o

500A, 30o
Z2=40 +j30

Vs
Vr1
Vr2

Vr1=
Vr2=

ILine

Loop current due to phase shift

between Vr1 and Vr2
Iloop=( Vr1-Vr2)/ ( Z1+Z2)

Vr2

500A , 30o

SSSC
Vs
200 kV, 0o

Vs
Vpq

Z1=30+j4
0
500A, 30o
Vr2

Vr1

Vpq

Z2=40 +j30
SSSC

Vr1

Vr2
Loop current due to phase shift
between Vr1 and Vr2 is reduced to
zero by injecting Vpq

ILine

Vpq

r1

r2

2Vr1Vr 2 cos( )