Hardware/Software CoDesign

Embedded Systems
System
Environment
Zone 4: Global
Satellite
Zone 3: Suburban Zone 2: Urban

Embedded Software

Zone 1: In-Building

Macro-Cell

Micro-Cell Pico-Cell

Memory

SOC IP
Based Design

Software

P/C

Analog
SOC

Embedded
System Design

Firmware

CORE

PCB
Design

TSP

Embedded Hardware

Input

Communication

Sensors
Sample and Hold Circuit
A/D Converters
UART

Processing Units

ASIC
Processors
Reconfigurable processors
TSP

Embedded Hardware

Memories

RAM, ROM, Flash, Cache

Output

D/A Converters,
Actuators

TSP

Embedded Software

Real Time Operating Systems

Scheduling in RTOS

General Requirements
Aperiodic
Periodic

Real Time Databases

Other Software Architectures

Function Queue Scheduling

Round Robin (with Interrupts)
TSP

Issues while Designing ES

Choosing Right platform

Memory and I/O Requirements

WDT, Cache, Flash memory, etc

Processors Choice

PLC
Micro Controller or DSP
ASIC or FPGA
TSP

Hardware /Software
Partitioning

Definition

A HW/SW partitioning algorithm

implements a specification on some
sort of multiprocessor architecture

Usually

Multiprocessor architecture = one CPU +

some ASICs on CPU bus

TSP

Hardware /Software
Partitioning

Hw/Sw partitioning can speedup

software
Can reduce energy too
In most partitioning algorithms

Type of CPU is fixed and given

ASICs must be synthesized
TSP

Embedded System Design

Traditional Methodology
Hardware/Software
Partitioning and Allocation
HW Design
& Build

SW Design
& Code
Interface
Design
HW/SW
Integration

TSP

Embedded System Design

HW/SW Co-Design Methodology
Hardware/Software
Partitioning and Allocation
HW Design
& Build

SW Design
& Code
Interface
Design
HW/SW
Integration

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Co-Design

The software functionality should be

partitioned in such a fashion that
processors in the system do not get
overloaded when the system is
operating at peak capacity.
This involves simulating the system
with the proposed software and
hardware architecture.
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Co-Design

The system should be designed for

future growth by considering a scalable
architecture, i.e. system capacity can
be increased by adding new hardware
modules. The system will not scale
very well if some hardware or software
module becomes a bottleneck in
increasing system capacity.
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Embedded Controller Example:

Engine Control Unit (ECU)

Task: control the torque produced

by the engine
by timing fuel injection and spark

Major constraints:
Low fuel consumption
Low exhaust emission
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ECU Task: control injection time (3 sub-tasks)

compute
air flow

air
flow

look-up table
engine temperature

compute
injection
time
throttle position
engine speed
injection
air temperature
time
air pressure

TSP

drive
actuators

PWM signals

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ECU- Option 1
look-up table
compute
air flow

air
flow

engine temperature
compute
injection
time

drive
actuators

throttle position
engine speed
air temperature
air pressure

injection
time
PWM signals

Analog inputs
A/D
32 bit CPU

Actuations (PWM)

Digital inputs

TSP

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ECU- Option 2
look-up table
compute
air flow

air
flow

engine temperature
compute
injection
time

drive
actuators

throttle position
engine speed
air temperature
air pressure

injection
time
PWM signals

Analog inputs
A/D
16 bit CPU

FPGA
Actuations (PWM)

Digital inputs

TSP

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ECU- Option 3
look-up table
compute
air flow

air
flow

engine temperature
compute
injection
time

drive
actuators

throttle position
engine speed
air temperature
air pressure

injection
time
PWM signals

Analog
inputs

A/D

DSP
8 bit CPU FPGA
Actuations (PWM)

Digital inputs

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Thank You

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