EMC Design of PCBs

Contents

Introduction
Component selection and mounting
PCB trace impedance
PCB layer stackup
Crosstalk control
Power distribution
Decoupling

Contents

Zoning
Grounding
VIAs connection
Termination

Introduction

Introduction

Introduction
EMC Control Measures
can be incorporated at
three levels.
Primary level (PCB, Circuit
etc)
Secondary level (Cables,
connector etc)
Tertiary level (Shielding)

Introduction

Introduction
Primary Level
Circuit design measures, Board layout
grounding

Secondary Level
Cables & Connectors

Tertiary Level
Apertures ,Gaskets etc

Component Selection & Mounting

Digital circuits
Digital circuits are generator of EMI,high
frequency square-waves are rich in harmonics
are distributed throughout the system.

Analog circuits
Analog circuits are much quieter because high
frequency square waves are not normally the
feature.

Component Selection & Mounting

Fourier transform
Basic to understanding of why switching circuit cause
interference is the concept of time domain /frequency
domain transform
Switching waveform can be represented as
trapezoidal with defined rise and fall time .The
harmonic amplitude content of a trapezoid decreases
from the fundamental at a rate of 20dB per decade
until a breakpoint is reached at 1/ptr, after which it
decreases at 40dB/decade

Component Selection & Mounting

Component Selection & Mounting

It is advisable to use the slowest logic
family that will do the job; dont use fast
logic when it is unnecessary. Treat with
caution any proposal to substitute devices
from a faster logic family, such as
replacing 74HC parts with 74AC.

Component Selection & Mounting

Harmonics contents of different logic families

Component Selection & Mounting

Some IC manufacturers are addressing the problem of RF
emissions at the chip level.
By careful attention to the internal switching regime of VLSI
devices, noise currents appearing at the pins can be
minimized.
The transition times can be optimized rather than minimized
for a given application .
Revised package design and smaller packages can allow
the decoupling capacitor to be placed as close as possible
to the chip, without the internal lead frames inductance
negating its effect;

Component Selection & Mounting

From the point of view of immunity, a
slow logic family will respond less
readily to fast transient interference

Component Selection & Mounting

The high frequency spectral content of the
component signal are gauged by the signal
speed :

where f0 is the fundamental frequency (inverse

of repetition rate) of its signal, I0 is the
magnitude of its drive current, and tr is its
rise/falltime

Component Selection & Mounting

In a digital system we know that the key
component of a signal that dictates its highfrequency spectral content is its rise/falltime. In
fact we can say that a digital signal has a
bandwidth that is essentially the reciprocal of
its risetime, BW 1/tr . Hence a clock having a
500 ps rise/ falltime has significant spectral
content up to 2 GHz.

Component Selection & Mounting

In the initial layout of the PCB, a spreadsheet
should be compiled of every part to be placed on
the PCB according to its speed.
This priority list should be given to the layout
personnel with instructions to apply the greatest
care to placement of the highest-speed
components at the top of the list and to place the
components first according to the highest speed
and next to the next lowest speed, and so on.

Component Selection & Mounting

Numerous automated layout software provide for
autorouting so that the schematic is laid out and parts
connected in a rather automatic manner. This can and
usually does create severe EMC problems unless it is
used judiciously.
It is best to place the highest-speed components
manually and to manually route their connection lands
with the previous concepts kept in mind

Component Selection & Mounting

As a general principle, recall that the higher the spectral
content of a signal, the greater the ability of that signal to
couple inadvertently to other conductors and parts.

Hence the highest speed components and the lands they

connect should be positioned on the PCB well away
from off board connectors and lands as shown below.

Component Selection & Mounting

Component Selection & Mounting

Anticipating that the rise/ falltimes of this clock may need to be

increased to reduce its high-frequency content, pads should be
placed so that
(a) a series resistor can be inserted in the lands and
(b) a capacitor can be inserted across the lands forming a lowpass
filter.

Component Selection & Mounting

In the beginning, the capacitor pads would not be populated, and a

0-V surface-mount resistor could be placed in series with the clock
lands.
Later in the design, if problems are uncovered necessitating
increasing the clock rise/falltimes, then the capacitor can be added
and the value of the series resistor can be changed.
Why is this significant? The answer is that no time-consuming
repeated PCB layout would be required; only the bill of materials
(parts list) need be changed. This is a virtually cost-free solution.

Component Selection & Mounting

Once again, it is a good practice to place all the
components, or at least the higher-speed ones, by hand
and not allow automatic software to do this.
Perhaps in the future EMC layout rules will be
incorporated into these layout tools, but today it seems
better to place these components by hand.

Component Selection & Mounting

Illustration of the unintentional coupling of signals between chip

bonding wires, causing supposedly quiet module pins to have highfrequency spectral content. A processor pin, the reset pin, was
thought to be quiet and hence was connected to a long PCB land.
Unsuspected coupling caused it to carry the clock signal, thereby
creating large radiated emissions. A series inductor was added to
prevent this from occurring.