A HIGH PERFOMANCE LOW POWER EMITTER

TRANSISTOR

BY-:
ABHISHEK KR. DIWAKAR
REG.NO.-1605070026

NEED FOR LOW POWER DEVICES

Due to integration of components increased the

power comes in lime light

It is much important that handheld devices must

possess low power devices

For better performance

For long run time (Battery time)

Low Power Design Space

Three parts that we can perform low power techniques

to reduce power dissipation
Voltage
Physical

Capacitance

Switching

activity

INTRODUCTION

Power dissipation becomes a limiting factor for large-scale

integration.
Thus, power must be reduced without degrading circuit
performance.
Reducing the power level, however, results in lower frequency
response
Since the transistor is operated at a lower current level than
that corresponding to maximum current gain and cutoff
frequency.
In addition, capacitances remain relatively high, further
decreasing performance.

INTRODUCTION CONTD
Reducing the device area reduces capacitance, but
the present state of contact printing sets a lower limit
on device size, especially on transistor contacts.
Decreasing contact size, especially that of the emitter,
makes smaller capacitances realizable.
In addition devices can operate at peak performance

Bipolar Junction Transistors

(BJT)

A bipolar transistor
essentially consists of a
pair of PN Junction
diodes that are joined
back-to-back.
There are therefore two
kinds of BJT, the NPN
and PNP varieties.
The three layers of the
sandwich are
conventionally called
the Collector, Base,
and Emitter.

BJT Fabrication
BJT can be made either as discrete devices or in planar
integrated form.
In discrete, the substrate can be used for one
connection, typically the collector.
In integrated version, all 3 contacts appear on the top
surface.
The E-B diode is closer to the surface than the B-C
junction because it is easier to make the havier
doping at the top.

 Early BJTs were fabricated using alloying - an

complicated and unreliable process.
The structure contains two p-n diodes, one between the
base and the emitter, and one between the base and the
collector.

BJT Structure - Planar

The Planar Structure developed by

Fairchild in the late 50s shaped the basic
structure of the BJT, even up to the
present day.

In the planar process, all steps are

performed from the surface of the wafer

BJTs are usually constructed vertically

Controlling depth of the emitters n doping sets
the base width

Advanced BJT Structures

The original BJT structure survived, practically

unchanged, since the mid 60s.
As the advances in MOS development
appears, some of the fabrication technology
are also applied to the BJT.

Low defect epitaxy

Ion implant
Plasma etching (dry etch)
LOCOS (local oxidation of Si)
Polysilicon layers
Improved lithography

BJT Processing
1. Implantation of the buried n+ layer
2. Growth of the epitaxial layer
3. p+ isolation diffusion
4. Base p-type diffusion
5. Emitter n+ diffusion

n+ layer

p+ layer

n+ layer
p-base layer

n+ buried layer

6. p+ ohmic contact
7. Contact etching
8. Metal deposition and etching
9. Passivation and bond pad opening

p-substrate

BJT Processing
1. Implantation of the buried n+ layer
2. Growth of the epitaxial layer
3. p+ isolation diffusion
4. Base p-type diffusion
5. Emitter n+ diffusion
6. p+ ohmic contact
7. Contact etching
8. Metal deposition and etching
9. Passivation and bond pad opening

p-substrate

BJT Processing
1. Implantation of the buried n+ layer
2. Growth of the epitaxial layer
3. p+ isolation diffusion
4. Base p-type diffusion
5. Emitter n+ diffusion
6. p+ ohmic contact

n epi layer

7. Contact etching
n+ buried layer

8. Metal deposition and etching

9. Passivation and bond pad opening

p-substrate

2. Growth of the epitaxial layer

p+ isolation layer

1. Implantation of the buried n+ layer

p+ isolation layer

BJT Processing

3. p+ isolation diffusion
4. Base p-type diffusion
5. Emitter n+ diffusion
6. p+ ohmic contact
7. Contact etching
n+ buried layer

8. Metal deposition and etching

9. Passivation and bond pad opening

p-substrate

2. Growth of the epitaxial layer

p+ isolation layer

1. Implantation of the buried n+ layer

p+ isolation layer

BJT Processing

3. p+ isolation diffusion
4. Base p-type diffusion
5. Emitter n+ diffusion
6. p+ ohmic contact

p-base layer

7. Contact etching
n+ buried layer

8. Metal deposition and etching

9. Passivation and bond pad opening

p-substrate

2. Growth of the epitaxial layer

p+ isolation layer

1. Implantation of the buried n+ layer

p+ isolation layer

BJT Processing

3. p+ isolation diffusion
4. Base p-type diffusion
5. Emitter n+ diffusion
6. p+ ohmic contact

n+ layer

n+ layer
p-base layer

7. Contact etching
n+ buried layer

8. Metal deposition and etching

9. Passivation and bond pad opening

p-substrate

2. Growth of the epitaxial layer

p+ isolation layer

1. Implantation of the buried n+ layer

p+ isolation layer

BJT Processing

3. p+ isolation diffusion
4. Base p-type diffusion
5. Emitter n+ diffusion
6. p+ ohmic contact

n+ layer

p+ layer

n+ layer
p-base layer

7. Contact etching
n+ buried layer

8. Metal deposition and etching

9. Passivation and bond pad opening

p-substrate

BJT Processing
1. Implantation of the buried n+ layer
2. Growth of the epitaxial layer
3. p+ isolation diffusion

p+ isolation layer

4. Base p-type diffusion

5. Emitter n+ diffusion
6. p+ ohmic contact

n+ layer

p+ layer

n+ layer
p-base layer

7. Contact etching
n+ buried layer

8. Metal deposition and etching

9. Passivation and bond pad opening

p-substrate

BJT Processing
1. Implantation of the buried n+ layer
2. Growth of the epitaxial layer
3. p+ isolation diffusion

p+ isolation layer

4. Base p-type diffusion

5. Emitter n+ diffusion
6. p+ ohmic contact

n+ layer

p+ layer

n+ layer
p-base layer

7. Contact etching
n+ buried layer

8. Metal deposition and etching

9. Passivation and bond pad opening

p-substrate

BJT Processing
1. Implantation of the buried n+ layer
2. Growth of the epitaxial layer
3. p+ isolation diffusion

p+ isolation layer

4. Base p-type diffusion

5. Emitter n+ diffusion
6. p+ ohmic contact

n+ layer

p+ layer

n+ layer
p-base layer

7. Contact etching
n+ buried layer

8. Metal deposition and etching

9. Passivation and bond pad opening

p-substrate

Substrate PNP BJT

 Device fabrication is conventional through base diffusion.

After base diffusion, the wafer is thermally re -oxidized, so approximately
800 A0 of thermal oxide is grown over the base region
Approximately 2000 A0 thick pyrolytic SiO2 is deposited at 800C; this layer is
densified at 850 C in Ar for 15 minutes
Then a layer of Si3N4 (1600 A0) and pyrolytic SiO2 (2000 A0) is deposited as
shown in Fig. 1.

Next, using buffered HF, an opening is etched into the pyrolytic SiO 2 layer.
The etched window is 2.5 x 10 um, which can be obtained easily with
conventional photolithography. This opening serves as an etch-blocking
mask for etching the Si3N4 layer as shown in Fig. 2.

The Si3N4 is etched using hot phosphoric acid, which only negligibly attacks the
Si02 . A second photoresist masking step follows with an emitter pattern of 2.5 x
10 u.m. This mask crosses the first etched pattern in its center as shown in Fig. 3 .

Next the SiO2 is etched, resulting In a 2. 5 x 2.5 um opening. The

opening is achieved using the selective etch properties of SiO2/Si3N4.
Emitter As diffusion, as shown in Fig.4. was followed by base contact
opening. After sub etching the metallization the device was completed .

CONCLUSION
It

has been shown that 2.5 x 2.5 um emitters

can be fabricated so the square emitter is
retained, using conventional photoresist
masking methods
As a consequence of the "cross" emitter
structure ,emitter-base and collector-base
capacitances were the smallest reported
using conventional photolithography

THANKING YOU