EEET2045/2155

Semiconductor Device Fabrication

Assoc. Prof. Anthony Holland, anthony.holland@rmit.edu.au
99252150 room 10.8.9
This course is basically about silicon chip fabrication
i.e. the technologies used to manufacture integrated
circuits (ICs). The same technology is used to fabricate
many Micro-Electro-Mechanical Devices (MEMS) and
other microsystem devices. Nanotechnology electrical
devices extend these manufacturing technologies.
Global semiconductor sales reached USD$340 billion
(Semiconductor Industry Association) in 2016
Manufacturing of Silicon Chips

200mm is the wafer diameter used for standardising the graph.

K w/m is a unit meaning 1000 wafers per month.
Research and Development Expenditure
($USD) by top semiconductor companies.

Wow, the top 10

spent over
$35,000,000 on R&D
in 2016

Data is for 2016. The last column on the right compares 2016 with 2015
 Course Administration
Lectures
Assoc. Prof. Anthony Holland
Laboratory demonstrators and Tutors
Dr Alex Fechete, Mr Stanley Luong, Mr Tuan Anh
Bui, Ms Hiep Le Ngoc Tran, Ms Phuong Le Yen,
Mrs Chiping Wu
Course notes will be available on Blackboard. In particular see the lecture
powerpoint slides and the PDF files associated with the text book by
Plummer.
 Course Schedule
LECTURES:
Introduction weeks 1
Cleanroom processes, lab info. 2
Dopant Diffusion 3
Specific Device Fabrication 1 4
Ion Implantation 5
Thin Film Deposition 6
Photolithography1 7
Photolithography2 8
Etching 9
Oxidation 10
Specific Device Fabrication 2 11
Review 12

Tutorial sessions have been scheduled for EEET2155. These have no

assessment. They are designed to help with examination preparation
 Course Assessment
End of semester Exam:50% of overall course assessment
Laboratories : 20%,
Two class tests : 30%, (both worth 15% to the overall
marks). These will be conducted during lecture sessions
approximately week 6 and week 11 of semester 1. There
will be a practice test in week 4.

Participation in three cleanroom lab sessions (groups of 4, and

sessions are two hours each) will go towards half of the lab mark
(i.e. 10% of overall course assessment). The other 10% will be for
a small laboratory exercise to be conducted in the second half of
the semester. You should attend 6 weeks of labs, including the three
cleanroom sessions.
Cleanroom schedule. 4 students per session. 7 sessions
per week. Each group has three sessions

tutorials for EEET2155. EEET2045 students welcome

 Text for this course

Silicon VLSI Technology

Fundamentals, Practice and Modelling
James D. Plummer, Michael D. Deal, Peter B. Griffin

Available in RMITs library

Contains simulation sections in several chapters.
We will not cover this.
 Recommended reading
The Science and Engineering of Microelectronic Fabrication by
Stephen A. Campbell.

Silicon VLSI Technology, Fundamentals, Practice and Modelling, by

James D. Plummer, Michael D. Deal, Peter B. Griffin

Semiconductor Devices: Physics and Technology by S M Sze,

available in RMIT bookshop. This book is suitable for courses in
semiconductor fabrication and semiconductor physics

Solid State Electronic Devices by Ben G Streetman,

There are several other good books in the Swanston St library

covering the topics in this course..look up semiconductor
fabrication or microfabrication or silicon processing.
 And highly recommended is

Audio Visual Material for this

course, very useful to you

SILICON RUN
The RMIT library has this DVD series for your use
within the library. Go to the audiovisual section.
There are about seven DVDs in the series on
introduction to semiconductor fabrication,
photolithography etc.
1960s and early 1990s integrated circuits.
Progress due to:
Feature size reduction - 0.7X/3 years (Moores Law). This leads to
the maximum number of transistors on a chip doubling every two
years (another way of stating Moores Law).
Increasing chip size - 16% per year.
 History of minimum feature sizes

*
*

Dynamic Random-Access Memories (DRAMs - a type of silicon

chip) contain the highest component count of any IC chips. Hence
they are often used for comparing the progress in Silicon
technology over years. DRAMs consist of transistors. Transistors
today are 20 times faster and occupy less than 1% of the area of
those built 20 years ago.
 NTRS = National
Technology Roadmap for
Semiconductors. National
did mean the USA. It is
now called the ITRS (I for
International).

History and future projections for minimum feature

size in silicon chips.

Device limits appear today to be nm (100 ) channel

lengths in MOS transistors, but who can predict?!
 1990 IBM demo of scale lithography.
Technology appears to be capable of making structures much
smaller than currently known device limits.

Invention of the bipolar transistor - 1947, Bell Labs

by William Shockley, John Bardeen, Walter Brattain
 Abbreviations
N-type semiconductor. This indicates that electrons
are the charge carriers
P-type semiconductor. This indicates that holes are
the charge carriers.
MOS. Metal Oxide Semiconductor e.g. Aluminium
layer on a silicon dioxide layer on a silicon layer.
NMOS. A transistor in which the carriers are
electrons. Similarly PMOS.
FET. Field Effect Transistor
MOSFET. Join above terms
CMOS. Silicon chip technology in which both
NMOS and PMOS transistors are used.