FET Small-Signal

Analysis
 FET Small-Signal Model

Transconductance

The relationship of VGS (input) to ID (output) is called transconductance.

The transconductance is denoted gm.

ID
gm
VGS

Transfer
Curve
Graphical Determination of gm
 Mathematical Definition of gm

ID
gm
VGS

2IDSS VGS
gm 1

VP VP
Using differential calculus

Maximum gm at VGS =0V:

gm0
2IDSS VGS
gm gm0 1
VP VP

Effect of ID on gm for

VGS ID VGS ID
1 gm gm0 (1 ) gm0
VP IDSS VP IDSS
 FET Impedance

Input Impedance Zi:

Zi
Very large to assume input terminal
approximate an open circuit

Output Impedance Zo: 1

Zo rd
yos
yos: admittance equivalent circuit
parameter listed on FET
specification sheets.

VDS
rd
ID VGS constant
FET Specification
FET AC Equivalent Circuit
 JFET Fixed-Bias Configuration

The input is on the gate and the output is on the drain.

 JFET Fixed-Bias Configuration

Once again: same step as BJT to redraw the network to AC equivalent circuit.

Capacitor short circuit

DC batteries VGG and VDD are set to zero volts by a short-circuit
equivalent
AC Equivalent Circuit
AC Equivalent Circuit
 Impedances

Input Impedance: Output Impedance:

Zo RD || rd
Zi RG
Zo RD
rd 10RD
 Voltage Gain

Vo
Av gm(rd || RD)
Vi

Vo
Av gmRD
Vi rd 10RD
 Phase Relationship

A CS amplifier configuration has a 180-degree phase shift between input and output.
 Example

Fixed-bias configuration has an operating point defined

by VGSQ = -2V and IDQ = 5.625 mA, with IDSS = 10mA and VP
= -8V. The value of yos is provided as 40 S. Determine:
a) gm
b) Zi
c) Zo
d) AV
e) AV ignoring the effects
of rd
Solution
 JFET CS Self-Bias Configuration

This is a CS amplifier configuration therefore the input is on the gate and the output is on
the drain.
AC Equivalent Circuit
 Impedances

Input Impedance:
Zi RG
Output Impedance:
Zo rd || RD Zo RD
rd 10RD
 Voltage Gain

Av gm(rd || RD)

Av gmRD
rd 10RD
 Phase Relationship

A CS amplifier configuration has a 180-degree phase shift between input and output.
 JFET CS Self-Bias Configuration Unbypassed Rs

If Cs is removed, it affects the gain of the circuit.

AC Equivalent Circuit
 Impedances

Input Impedance:

Output Impedance:
Impedances
Voltage Gain
Voltage Gain
Example
Solution
Solution
 JFET CS Voltage-Divider Configuration

This is a CS amplifier configuration therefore the input is on the gate and the output is on
the drain.
AC Equivalent Circuit
 Impedances

Input Impedance: Zi R1 || R2 Output Impedance:

Zo rd || RD
Zo RD
rd 10RD
 Voltage Gain

Av gm(rd || RD)

Av gmRD
rd 10RD
 JFET Source Follower (Common-Drain) Configuration

In a CD amplifier configuration the input is on the gate, but the output is from the source.
AC Equivalent Circuit
 Impedances

Input Impedance: Zi RG Output Impedance:

1
Zo rd || RS ||
gm
1
Zo RS ||
gm rd 10RS
 Voltage Gain

Vo gm(rd || RS)
Av
Vi 1 gm(rd || RS)

Vo gmRS
Av
Vi 1 gmRS rd 10RS
 Phase Relationship

A CD amplifier configuration has no phase shift between input and output.

 JFET Common-Gate Configuration

The input is on source and the output is on the drain.

AC Equivalent Circuit
 Impedances

Applying Kirchhoffs voltage law around the output perimeter and Kirchhoffs current
law at node a ::
 Impedances

Input Impedance:

rd RD Zi RS || ( 1 )
Zi RS || gm rd 10RD
1 g mrd

Output Impedance:

Zo RD || rd Zo RD
rd 10RD
 Voltage Gain

Applying Kirchhoffs current law at node b ::

RD
g mRD
Vo rd
Av
Vi RD
1 rd

Av gmRD
rd 10RD
 Phase Relationship

A CG amplifier configuration has no phase shift between input and output.

 Depletion-Type MOSFETs

1. D-MOSFETs have similar AC equivalent models.

2. The only difference is that VSGQ can be positive for n-

channel devices and negative for p-channel devices.

3. This means that gm can be greater than gm0.

D-MOSFET AC Equivalent Model
 Find Example
VGSQ and IDQ
Determine gm and compare to gm0
rd
Find Zi, Zo, Av
 Enhancement-Type MOSFETs

There are two types of E-MOSFETs:

nMOS or n-channel MOSFETs

pMOS or p-channel MOSFETs
 E-MOSFET AC Equivalent Model

Forward transfer admittance

gm and rd can be found in the specification sheet for the FET.

E-MOSFET CS Drain-Feedback Configuration
AC Equivalent Circuit
 Impedances

Input Impedance: RF rd || RD Output Impedance:

Zi
1 gm(rd || RD)
Zo RF || rd || RD
RF
Zi
1 gmRD RF rd || RD, rd 10RD
Zo RD
RF rd || RD, rd 10RD
 The calculation
From Kirchoff' s Current Law at point D,
Vo
Ii gmVGS VGS Vin
rd RD
and
Ii Vi Vo
RF
We' ll find that,

Ii

Vi rd R D I i gmVi
RF
rearrangin g ,
Vi 1 gmrd R D I i RF rd R D
so,
RF
Zi
1 gmRD RF rd || RD, rd 10RD
 Zo RF||rd||RD

Zo RD
RF rd||RD, rd 10RD
From Kirchoff' s Current Law at point D,
Vo
Ii gmVGS VGS Vin
rd RD
and
Ii V i V o
RF
We' ll find that,
Vi Vo gmVGS Vo
RF rd RD
rearranging ,
1 1 1
Vo Vi gm
rd RD RF RF
so ,
1 1
R gm R gm
Vo F F




AV gm rd RD R
Vi 1 1
F



rd RD R 1
F rd RD R
F

gmRD RF rd||RD, rd 10RD
 The AC analysis of E-MOSFET
The relationsh ip between output current and
controlling voltage is as below;
ID k VGS VGSTh
2

We know that gm is defined by the slope of drain

characteristics,
ID
gm
VGS
The derivation of above equation will determine gm
at the operating point;

gm
ID

d
VGS dVGS

k VGS VGSTh
2

2k VGSQ VGSTh

Remember that, the biasing arrangement are limited for E-MOSFET

 Voltage Gain

Av gm(RF || rd || RD)

Av gmRD
RF rd || RD, rd 10RD
 Phase Relationship

This is a CS amplifier configuration therefore it has 180-degree phase shift between input
and output.
 Do it
Determine input and output and also AV
impedance for k=0.3X10-3
+VDD
(+16V)

2.2k

Vo

10M
VGS(Th)=3V
Vi rd=100k

Zi
E-MOSFET CS Voltage-Divider Configuration
AC Equivalent Circuit
 Impedances

Input Impedance:
Zi R1 || R2

Zo rd || RD
Output Impedance:

Zo RD
rd 10RD
 Voltage Gain

Av gm(rd || RD)

Av gmRD
rd 10RD
 Phase Relationship

This is a CS amplifier configuration therefore it has 180-degree phase shift

between input and output.
Solution
E-MOSFET CS Voltage-Divider Configuration
AC Equivalent Circuit
 Impedances

Input Impedance: Zi R1 || R2 [Formula

9.52] Zo rd || RD
Zo RD
Output Impedance: rd 10RD [Formula
9.53]
 Voltage Gain

Av gm(rd || RD) [Formula 9.55]

Av gmRD [Formula 9.56]

rd 10RD
Summary Table
Summary Table
 Try yourself
Design a self-bias network that have
gain of 10. The device should be biased
at VGSQ=1/3VP
+VDD
(+20V)

RD

Vo

Vi IDSS =12mA
VP=-3V
rd=40k

10M
Rs
Solution
To be continued