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DATA CONVERTER

FUNDAMENTALS
(CHAPTER 11)
The need for Data Converters

o Analog signal is filtered by an anti-aliasing filter to remove any high frequency


components that may cause an effect known as aliasing

o The signal is sampled and held and then converted into a digital signal

o DAC converts the digital signal back into an analog signal

o The output of the DAC is not as "smooth" as the original signal. A low pass
filter returns the analog signal back to its original form
Two main types of converters
• Nyquist-Rate Converters
i. Nyquist rate data converters are those converters that
Generate a series of output values having a one-to-
one relationship with a single input value.
ii. Rarely sample at Nyquist-rate because of need for
antialiasing and reconstruction filters.
iii. Typically 3 to 20 times input signal’s bandwidth or 1.5
to 10 times Nyquist rate.
• Oversampling Converters
i. Oversampling converters are those that Operate
much faster than Nyquist-rate (20 to 512 times faster)
by filtering out quantization noise that is not in
signal’s bandwidth.
ii. The output signal to noise ratio is increased.
iii. These makes use of Noise Shaping filters to remove
quantization noise.
Ideal D/A Converter
• An N-bit digital word is mapped into a
single analog voltage. Typically, the
output of the DAC is a voltage that is
some fraction of a reference voltage(or
current) Vout = FVREF
The number of input combinations represented by the input
word is related to the number of bits in the word by,

Number of input combinations = 2N


IDEAL A/D CONVERTER
PERFORMANCE LIMITATIONS
• The Transfer response of a D/A converter is defined to be
the analog levels that occur for every digital input word.
• The Transfer response of a A/D Converter is defined as the
midpoint of the quantization intervals for each of the digital
output words.
• Resolution
• Absolute Accuracy
• Relative Accuracy
• Offset and Gain errors
• Integral Non-Linearity Error
• Differential Non-Linearity Error
• Monotonicity and missing codes
• A/D Conversion Time and sampling rate
• D/A Settling time and sampling rate
• Dynamic Range
Decoder-Based D/A Converters

• This is the Straight forward approach.


• Here to realize an N-bit D/A converter is to
create 2N reference signals.
• These reference signals are to be passed to the
output depending upon the digital input word.
Resistor String Converters
• An N-bit version of this DAC simply consists
of 2N equal resistors in series and 2N switches
(usually CMOS), one between each node of
the chain and the output
• This architecture is simple
• inherently monotonic.
• It is linear if all the resistors are equal, but
may be made deliberately nonlinear if a
nonlinear DAC is required.
• Delay through the switch network major
speed limitation
Resistor string High speed operation

High Speed of operation.


Large Capacitor Loading
More Area
Folded Resistor String Converter

To reduce the amount of


digital decoding and large
capacitive loading this
converter is used.

Less Capacitive Load


Multiple R-string Converters
A second tapped
resistor string is
connected between
buffers whose inputs
are two adjacent
nodes of first string.

3 MSB’s determine
the operation of first
string.
Output is determined
by the Lower LSB’s
A/D Conversion - Types
• Can be classified in four groups:
– Integrator:
• Charges a capacitor for a given amount of time using the
analog signal.
• It discharges back to zero with a known voltage and the counter
provides the value of the unknown signal.
• Provides slow conversion but low noise.
• Often used in monitoring devices (e.g., voltmeters)

– Flash: uses multiple comparators in parallel.


• The known signal is connected to one side of the comparator
and the analog signal to be converted to the other side of the
comparator.
• The output of the comparators provides the digital value.
• This is a high-speed, high cost converter.

– Successive approximation: Includes a D/A (digital to analog)


converter and a comparator. An internal analog signal is generated
by turning on successive bits in the D/A converter.

– Counter: Similar to a successive approximation converter except


that the internal analog signal is generated by a counter starting at
zero and feeding it to the D/A converter.
Flash A/D CONVERTER
Issues in Designing Flash A/D Converters
Input Capacitive Loading — The Large number of comparators
connected to Vin results in a parasitic load at the node Vin -- use
interpolating architectures.
Resistor-String Bowing — Due to Iin of bipolar comparators cause
errors in the voltages of the nodes of the resistor strings—These errors
are more at the center of the string — force center tap (or more) to be
correct.
Signal and/or Clock Delay — Small arrival difference in clock or input
signals at comparators cause errors — One means of easing the
problem is to precede the converter by the sample and hold circuit ---
route clock and Vin together with the delays matched Match capacitive
loads
Substrate and Power-Supply Noise — In IC’s having clock signal in
the tens of MHz, it is difficult to keep power supply noise below a few
tenths of a volt. This Power supply noise coupled through substrate
causes errors — clocks is to be shielded from the substrate and from
analog circuitry – Analog and digital power supplies should be
separated(use on-chip supply cap bypass)

Flashback — Glitch at input due to going from track to latch mode —


use preamps in comparators and match input impedances.
BUBBLE ERRORS
Circuit to Remove Bubble errors
TIME INTERLEAVED A/D CONVERTER

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