Stick Diagrams

Stick Diagrams

MOS Layers

Layout Design Rules

1
 Stick Diagrams

Stick Diagrams

 Objectives:
• To know what is meant by stick diagram.
• To understand the capabilities and limitations of stick
diagram.
• To learn how to draw stick diagrams for a given MOS
circuit.

 Outcome:
• At the end of this module the students will be able
draw the stick diagram for simple MOS circuits.

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 Stick Diagrams

Stick Diagrams

N+ N+

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 Stick Diagrams

Stick Diagrams

VDD
VDD
X

X
x Stick x x
x Diagra X
m

Gnd Gnd

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 Stick Diagrams

Stick Diagrams

VDD
VDD
X

X
x x x
x X

Gnd Gnd

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 Stick Diagrams

Stick Diagrams

 VLSI design aims to translate circuit concepts

onto silicon.
 stick diagrams are a means of capturing
topography and layer information using
simple diagrams.
 Stick diagrams convey layer information
through colour codes (or monochrome
encoding).
 Acts as an interface between symbolic circuit
and the actual layout.
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 Stick Diagrams

Stick Diagrams

 Does show all components/vias.

 It shows relative placement of components.
 Goes one step closer to the layout
 Helps plan the layout and routing

A stick diagram is a cartoon of a layout.

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 Stick Diagrams

Stick Diagrams

 Does not show

• Exact placement of components
• Transistor sizes
• Wire lengths, wire widths, tub boundaries.
• Any other low level details such as parasitics..

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 Stick Diagrams

Stick Diagrams – Notations

Metal 1

poly

ndiff

pdiff
Can also draw
in shades of
gray/line style.

Similarly for contacts, via, tub etc..

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 Stick Diagrams

Stick Diagrams – Some rules

Rule 1.
When two or more ‘sticks’ of the same type cross
or touch each other that represents electrical
contact.

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 Stick Diagrams

Stick Diagrams – Some rules

Rule 2.
When two or more ‘sticks’ of different type cross
or touch each other there is no electrical contact.
(If electrical contact is needed we have to show the connection
explicitly).

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 Stick Diagrams

Stick Diagrams – Some rules

Rule 3.
When a poly crosses diffusion it represents a
transistor.

Note: If a contact is shown then it is not a transistor.

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 Stick Diagrams

Stick Diagrams – Some rules

Rule 4.
In CMOS a demarcation line is drawn to avoid
touching of p-diff with n-diff. All pMOS must lie
on one side of the line and all nMOS will have
to be on the other side.

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 Stick Diagrams

How to draw Stick Diagrams

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Stick Diagrams

NOR Gate

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 Stick Diagrams

Boolean Expression

Power

A Out

Ground

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 Stick Diagrams

Stick Diagrams

 Summary:

• What is stick diagram?

• Why stick diagram?
• Conventions and rules related to stick diagram.
• Drawing stick diagrams.

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 Stick Diagrams

Stick Diagrams

 Home work:
1. Draw the stick diagram for two input CMOS NAND
gate.
2. Draw the stick diagram for two input NAND gate
using NMOS Logic.
3. Draw the stick diagram for 2:1 MUX using
a) Pass transistors
b) Transmission gates.

Drawing stick diagram is truly Fun!!. Enjoy it.

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Stick Encoding Layer Mask Layout Encoding

N-diffusion

Polysilicon

Metal1

Contact cut

Or Or

Buried contact
NOT applicable Overglass

Implant
 Stick Encoding Layer Mask Layout Encoding

P-Diffusion

Not Shown in Stick P+ Mask

Diagram

Metal1

VIA

Demarcation Line P-Well

Vdd or GND
CONTACT

ECEA
21
For reference : an nMOS Inverter coloured stick
diagram

* Note the depletion mode device

Vdd = 5V

Vout
Vin

ECEA
 Layout- Lambda (λ)-based design rules

All paths in all layers will be

dimensioned in λ units and subsequently
λ can be allocated an appropriate value
compatible with the feature size of the
fabrication process.
 Lambda Based Design Rules

 Design rules based on single parameter, λ

 Simple for the designer
 Wide acceptance
 Provide feature size independent way of setting out
mask
 Minimum feature size is defined as 2 λ
 Used to preserve topological features on a chip
 Prevents shorting, opens, contacts from slipping out of
area to be contacted
 Thinox

Metal 1
n-diffusion p-diffusion
3λ
2λ
3λ 3λ
2λ 3λ

Metal 2
2λ
4λ
2λ
2λ 4λ
Polysilicon
4λ
Minimum distance rules between device layers, e.g.,
• polysilicon  metal
• metal  metal
• diffusion  diffusion and
• minimum layer overlaps
 Contact Cuts

• Three possible approaches –

1. Poly to Metal
2. Metal to Diffusion
3. Buried contact (poly to diff) or butting contact
(poly to diff using metal)
nMOS transistor mask representation

gate polysilicon

source
drain

metal

Contact holes

diffusion (active
region)
 Layout Design rules & Lambda ()

2

• Minimize spared diffusion

• Use minimum poly width (2) •Width of contacts = 2
•Multiply contacts
 Layout Design rules & Lambda ()

3
6

6

2
2
All device mask dimensions are based on multiples of , e.g., polysilicon minimum
width = 2. Minimum metal to metal spacing = 3
Layout Design rules & Lambda ()
CMOS Layout

N Well
P diff

Contacts

Poly Metal

N diff

P Substrate
 Layout Design rules & Lambda ()

Width of pMOS
should be twice the
width of nMOS

• Same N and P alters symmetry • L min

• Wpmos=2 Wnmos
CMOS Inverter Mask Layout

ECEA
 CMOS Layout Design

• CMOS IC are designing using stick diagrams.

• Different color codes for each layer.
• Lamda/micron grid.
CMOS AN2 (2 i/p AND gate) Mask Layout

ECEA