Documente Academic
Documente Profesional
Documente Cultură
microcontroller
Contents
Registers of 8051.
External interrupts
On-chip Timer/Counter
Interrupt ROM for
On-chip Timer 1 Counter
Control program
code RAM Timer 0 Inputs
CPU
Bus Serial
4 I/O Ports
OSC Control Port
P0 P1 P2 P3 TxD RxD
Address/Data
Comparison of the 8051 Family Members
4
PSW Register:-
What Are SFRs?
Pin Description of the 8051
P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3 4 8051 37 P0.2(AD2)
P1.4 5 36 P0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
Inside Structure of 8051 Microcontroller
Pins of 8051
• Vcc ( pin 40 ):
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
• GND ( pin 20 ): ground
• XTAL1 and XTAL2 ( pins 19,18 ):
– These 2 pins provide external clock.
– Way 1 : using a quartz crystal oscillator
– Way 2 : using a TTL oscillator
– Example 4-1 shows the relationship between XTAL
and the machine cycle.
XTAL Connection to 8051
• Using a quartz crystal oscillator
C2
XTAL2
30pF
C1
XTAL1
30pF
GND
Example :
Find the machine cycle for
(a) XTAL = 11.0592 MHz
(b) XTAL = 16 MHz.
Solution:
P0.0
DS5000 P0.1
Port 0
8751 P0.2
P0.3
8951 P0.4
P0.5
P0.6
P0.7
Dual Role of Port 0
• When connecting an 8051/8031 to an external
memory, the 8051 uses ports to send addresses and
read instructions.
– 8031 is capable of accessing 64K bytes of external
memory.
– 16-bit address : P0 provides both address A0-A7,
P2 provides address A8-A15.
– Also, P0 provides data lines D0-D7.
74LS373
PSEN OE
ALE 74LS373 OC
G
P0.0 A0
D
P0.7 A7
D0
D7
EA
P2.0 A8
P2.7 A15
8051 ROM
Reading ROM
2. 74373 latches the
1. Send address to
PSEN address and send to
ROM OE
ROM
ALE OC
G 74LS373
P0.0 A0
D
P0.7 A7
Address
D0
D7
EA
P2.0 A8
P2.7 A12
8051 ROM
Reading ROM
2. 74373 latches the
address and send to
PSEN ROM OE
ALE 74LS373 OC
G
P0.0 A0
D
P0.7 Address A7
D0
D7
EA 3. ROM send the
instruction back
P2.0 A8
P2.7 A12
8051 ROM
ALE Pin
• The ALE pin is used for de-multiplexing the
address and data by connecting to the G pin of
the 74LS373 latch.
– When ALE=0, P0 provides data D0-D7.
– When ALE=1, P0 provides address A0-A7.
– The reason is to allow P0 to multiplex address and
data.
Port 2 ( pins 21-
28 )
• Port 2 does not need any pull-up resistors since
it already has pull-up resistors internally.
P3.0 RxD 10
P3.1 TxD 11
P3.2 INT0 12
P3.3 INT1 13
P3.4 T0 14
P3.5 T1 15
P3.6 WR 16
P3.7 RD 17