Documente Academic
Documente Profesional
Documente Cultură
Seminar On
Neuro-quantum structures
Single-electron devices, for
instance transistors
Tunable lasers
Photodetectors
Sensors
Quantum Computing: Quantum
Cellular Automata
• Producing dots of small positional and size variability usually involves the use of
electron beam lithography, which is similar to conventional lithography except that
patterns are traced out using an electron beam rather then using a mask and light.
• Conventional lithography is not capable of creating devices at that scale since the
wavelength of light used is greater then the required feature size.
• The image below shows three different quantum dot structures:
• As we can see the shape of a quantum dot is not necessarily round and varies
depending on the process and application.
QCA – The Four Dot Device
out
in
out
in
out
in
Other QCA Structures-- Wires
• 90-degree wire
• 45-degree wire
– Normal and inverted signal available on the same wire
Quantum Dot Majority Gate
in in
in out in out
in in
Basic QCA Gate – Majority
Input A
Input B Output
Input C
Input A 1 1 1 Output
00 0
1
Input C
Majority 0,1,1 1
10 1
1
Quantum Dot Logic Gates that use NOT
• AND, OR, NAND, etc can be formed from the NOT and the
MAJ gates
0 0
0
1 0 1
A nand B
A A and B A
1
1
0
B 1 1 B
A A or B
0
B
QCA single-bit full adder
.
References
• Debashis De, Sitanshu Bhattacharaya and K. P. Ghatak, Quantum Dots and
Quantum Cellular Automata: Recent Trends and Applications,Nova, 2013
• Srivastava, S.; Asthana, A.; Bhanja, S.; Sarkar, S., "QCAPro - An error-
power estimation tool for QCA circuit design," in Circuits and Systems
(ISCAS), 2011 IEEE International Symposium on, vol., no., pp. 2377-2380,
15–18 May 2011
• M. Rahimi Azghadi, O. Kavehei and K. Navi, “A Novel Design for
Quantum-dot Cellular Automata Cells and Full Adders”, Journal of Applied
Sciences, Vol. 7, No. 22, pp. 3460-3468, 2007.
http://scialert.net/qredirect.php?doi=jas.2007.3460.3468&linkid=pdf
• V.V. Zhirnov, R.K. Cavin, J.A. Hutchby, and G.I. Bourianoff, “Limits to
binary logic switch scaling—A gedanken model,” Proc. IEEE, vol. 91,
p. 1934, Nov. 2003.
• S. Bhanja, and S. Sarkar, “Probabilistic Modeling of QCA Circuits using
Bayesian Networks”, IEEE Transactions on Nanotechnology, Vol. 5(6),
p. 657-670, 2006.