Lecture 01

Advanced Computer Architecture
Lecture 01:Review of Technology

Trends: Cost, Performance and
Quantitative Analysis
Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Course Logistics
 Course Description
This course is designed to give an in-depth understanding of the
inner workings of modern digital computer systems and tradeoffs of
different design options
 Course Material
Required:
Computer Architecture: A Quantitative Approach, Third Edition
By David Patterson, and John Hennessy
Material distributed in the class
Reference:
Computer Organization & Design, The Hardware/Software Interface, Second
Edition By David Patterson, and John Hennessy
 Prerequisite
 Prerequisites for the course are thorough understanding of Digital Logic
Design and Computer Architecture concepts including but not limited
to combinational and sequential circuits, pipelining, types of architecture,
datapath and control unit, state machine design, ASM, micro-coded state
machine design etc.
 Good Knowledge of either Verilog HDL or C programming is must

Course Logistics
Instructor: Muddassar Farooq

muddassa.farooq@udo.edu.

Course Logistics
 Grading Policy
Assignments + Quizes 0%
Research Paper 10%
Mid Term 10%
Project 40%
Final 40%
Project
Design of a TBD type processor in Verilog HDL or its simulator in C
Specs of the project will be discussed later during the course
Better to identify the partner earlier to work as a group/team
Course Contents Outline
 Technology Trends & Performance

 Instruction Set Architecture (detail design
& implementation)
 Pipelining (concepts, hazards and removal)
 Parallelism (multiple topics)
 Multi Instruction Issue Machine(s) (VLIW,
Superscalar)
 Memory Hierarchy (cache design)
 Interconnect Bus (PCI Bus)

Technology Trends: Cost, Performance
and Enhancement

Flavors of Computing
Desktop Computers :
 Spans low-end (<$50) to high-end (≈ $5K) systems

 Optimize price-performance
 Performance measured in the number of calculations and
graphic operations
 Price is what matters to customers
 Arena where the newest highest performance
processors appear
 Performance Measure: clock rate appears as the direct
measure of performance

Servers :
 Provide more reliable file and computing services
(Web servers)
 Key requirements
 Availability: Effectively provide service
 Reliability – never fails
 Scalability – server systems grow over time so the
ability to scale up the computing capacity is crucial
 Performance Measure– transactions per minute

Embedded Computers:
 Computers as parts of other devices where their presence is
not obviously visible
 e.g., home appliances, printers, smart cards, cell phones
 Wide range of processing power and cost
 ≈ $1 (8-bit, 16-bit processors), $10 (32-bit capable to execute 50M
instructions per second), ≈ $100-200 (high-end video games and
network processors)
 Requirements
 Real-time performance requirement
 Minimize memory requirements, power consumption
 Embedded system design approaches:
 Combined hardware/software solution with custom hardware
on the same chip
 Only custom software running on an off-the-shelf Processor

Technology Trends: Performance
 Performance
 Technology Advances
 CMOS VLSI (copper interconnect) advancing towards
gold interconnect
 Computer architecture advances
 RISC, superscalar, VLIW
 Price: Lower costs due to …
 Simpler development
 CMOS VLSI: smaller systems, fewer components
 Higher volumes
 CMOS VLSI : millions of units reduce the
development cost

Moore’s Law
 Increased density of components on chip
 Number of transistors on a chip will double every
year
 Number of transistors doubles every 18 months
 Cost of a chip has remained almost unchanged

 Higher packing density means shorter electrical
paths, giving higher performance
 Smaller size gives increased flexibility
 Reduced power and cooling requirements
 Fewer interconnections increases reliability

Technology Trends
IC technology - +55% more transistors per

chip a year
Semiconductor DRAM – 50% per year
Magnetic Disk Technology – disk density

100% per year

Effects of Rapid Technology Trends
Consider today’s product cycle

 concept to production = 2 years
AND market requirement

 of something new every 6 - 12 months
Implications
 pipelined design efforts using multiple design teams
 have to design for a complexity target that can’t be
implemented until the end of the cycle

 can’t afford to miss the best technology so you have to
chase the trends

Cost
Cost of an IC

Cost
Where alpha depends on the process

the more complex the higher the alpha value
for MOS, it is 2
it is about 6 for garden variety BiCMOS,
3 for 3 Metal CMOS.

Some Example Processor Die Sizes
AMD
 .35u K6 = 162 mm2
 .25u K6-2 = 68 mm2
 .25u K6-3 (256K L1) = 135 mm2
Cyrix
 .6u 6x86 = 394/225 mm2
 .35u 6x86 = 169 mm2
 .25u 6x86 (64K L1) = 65 mm2
IDT
 .35u Centaur C6 = 88 mm2
 .25u C6 = 60 mm2

Modern Processor Die Sizes
Intel
 Pentium
 .8u Pentium 60 = 288 mm2

 .6u Pentium 90 = 156 mm2
 .35u = 91 mm2
 .35u MMX = 140/128 mm2
 Pentium Pro
 .6u = 306 mm2

 .35u = 195 mm2
 .6u w/ 256K L2 = 202 mm2
 .35u w/512K L2 = 242 mm2
 Pentium II
 .35u = 205 mm2

 .25u = 105 mm2

Modern Processor Die Sizes
HP
 .5u PA-8200 = ~400 mm2
 .25u PA-8500 (.5 MB IL1, 1MB DL1) = ~900 mm2
DEC
 .5u 21164 = 298 mm2
 .35u 21264 = 310 mm2
Motorola
 .5u PPC 604 = 196 mm2
 .35u PPC 604e = 148/96 mm2
 .25u PPC 604e = 47.3 mm2

Cost and Performance
 Purchasing perspective
 given a collection of machines, which has the
 best performance ?
 least cost ?
 best performance / cost ?
 Design perspective
 faced with design options, which has the
 best performance improvement ?
 least cost ?
 best performance / cost ?
 Both require
 basis for comparison
 metric for evaluation
 Our goal is to understand cost and performance implications
of architectural choices

Performance Measure
Which computer has better performance?

 User: one which runs a program in less time
 Computer center manager:one which completes
more jobs in a given time
Users are interested in reducing
 Response time or Execution time
Managers are interested in increasing
 Throughput or Bandwidth

Aspects of Performance
instr count CPI clock rate

Program X
Compiler X X
Instr. Set X X X
Organization X X
Technology X

Performance Measurement
2 key aspects
 execution time
 Throughput
making 1 faster may slow the other
Comparing performance
 Performance = 1/execution time
 if X is N times faster than Y:
Similar for throughput comparisons

Some Measuring Options
 Arithmetic Mean- provides simple average: Does not
account for weight, all programs are treated equal!!
 Weighted Arithmetic Mean- Better
 Geometric Mean- is independent of running times of
individual programs
Make the Common Case Fast

 Easier said then done
 common cases are simpler than uncommon cases
 Trick is to quantify the advantage of a proposed enhancement

Amdahl’s Law
Quantification of the diminishing return principle

 defines speedup gained from a particular feature
Speedup due to enhancement E:

ExTime w/o E Performance w/ E
Speedup(E) = ------------- = -------------------
ExTime w/ E Performance w/o E
Suppose that enhancement E accelerates a fraction F of the task by

a factor S, and the remainder of the task is unaffected

Amdahl’s Law
ExTimenew = ExTimeold x (1 - Fractionenhanced )+

Fractionenhanced
Speedupenhanced
1
ExTimeold
Speedupoverall = =
ExTimenew (1 - Fractionenhanced ) + Fractionenhanced
Speedupenhanced

Amdahl’s Law
Example
Floating point instructions improved to run 2X;
but only 10% of actual instructions are FP
ExTimenew = ExTimeold x (0.9 + .1/2) = 0.95 x ExTimeold
1
Speedupoverall = = 1.053
0.95

Amdahl’s Law
Amdahl's Law
12
10
8
speedup
0
0 0.2 0.4 0.6 0.8 1
f

Calculating CPU Performance
All commercial machines are synchronous
 implies there is a clock which ticks once per cycle
 hence there are 2 useful basic metrics
•clock Rate - today in MHz
•clock cycle time
•clock cycle time = 1/clock rate
Hence
CPU time = CPU cycles for a program X Clock Cycle Time
OR

We tend to count instructions executed = IC

 note looking at the object code is just a start
 what we care about is the dynamic count - e.g. don’t forget loops,
recursion, branches, etc.
CPI is a figure of merit (e.g. the great RISC vs. CISC debate)
Hence alternate method to get CPU time

Result is 3 Focus Factors
 Cycle Time
 CPI
 IC
They are interdependent and making one better often makes

another worse
 Cycle time depends on HW technology and organization
 CPI depends on organization and ISA
 IC depends on ISA and compiler technology
Often CPI’s are easier to deal with on a per instruction basis

Hence

MIPS as a Measure for Comparing
 MIPS: Million Instructions Per Second

MIPS as a Measure for Comparing
 Problems with using MIPS as a measure for
comparison
 MIPS is dependent on the instruction set,making it
difficult to compare MIPS of computers with different
instruction sets
 MIPS varies between programs on the same
computer
 Most importantly, MIPS can vary inversely to
performance
 Example: MIPS rating of a machine with optional FP
hardware
 Example: Code optimization

Concluding Remarks
Measuring the Performance Components

Cycle time
 Easy for an existing CPU
 just put a frequency meter on the clock
 or even simpler look at the numbers on the crystal
 Much harder during design
 need to flush out the full logic design
 plus need to know the exact characteristics of the VLSI process
 then run a timing analyzer
IC
 Easy from instruction level simulator
CPI
 given the HW organization and an architectural simulator
 memory effects and program dependencies ==> stalls
MIPS is a good measure of performance

 if you like RISC/DSP, you’ll love this one

Computer Organization & Architecture

Computer Organization and
Architecture!!
 Computer Architecture refers to those attributes
of a system that is visible to the Programmer.
 Instruction Set: Number of Bits used to represent various data
types etc.
 Parallelism
 Pipelining
 I/O mechanism
 Memory Addressing Modes

Computer Organization and
Architecture!!
 Computer Organization refers to the operational
units and their interconnections.
 Control Signals
 Interfacing between Processor and peripheral devices
 Memory Technology
 Hardware details: Technology used

Computer System and Components
All computers consist of five components
 Processor: (1) datapath and (2) control
 (3) Memory
 I/O: (4) Input devices and (5) Output devices
Not all “memory” is created equally
 Cache: fast (expensive) memory are placed closer to
the processor
 Main memory: less expensive memory--we can have
more
Input and output (I/O) devices have the messiest organization
 Wide range of speed: graphics vs. keyboard
 Wide range of requirements: speed, standard, cost ...
 Least amount of research (so far)

Computer System and Components
Proc
Caches
Busses
adapters
Memory
Controllers
Disks
I/O Devices:
Displays Networks
Keyboards

Functional Level Aspects of Design

Task of Computer Designer
 “Determine what attributes are important

for a new machine; then design a
machine to maximize performance while
staying within cost constraints.”
 Aspects of this task
 instruction set design
 functional organization
 logic design and implementation

Instruction Set Architecture (ISA)

What is an instruction set?
The complete collection of instructions that

are understood by a CPU
 Machine Code
 Binary
 Usually represented by assembly codes

Evolution of ISA
 Major advances in computer architecture are typically associated
with landmark instruction set designs
– Ex: Stack vs GPR
 Design decisions must take into account:

 technology
 machine organization
 programming languages
 compiler technology
 operating systems
 applications
 And they in turn influence these

ISA: What Must be Defined?
Instructio  Instruction Format or Encoding
n  how is it decoded?
Fetch
 Location of operands and result
Instructio
n
 where other than memory?
Decode
 how many explicit operands?
 how are memory operands located?
Operand
Fetch
 which can or cannot be in memory?
 Data type and Size
Execute  Operations
 what are supported
Result  Successor instruction
Store  jumps, conditions, branches
 fetch-decode-execute is implicit!
Next
Instructio
n

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Advanced Computer Architecture

Lecture 01:Review of Technology

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Instructor: Muddassar Farooq

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Research Paper 10%

Mid Term 10%

 Technology Trends & Performance

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

 Spans low-end (<$50) to high-end (≈ $5K) systems

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

 Cost of a chip has remained almost unchanged

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

IC technology - +55% more transistors per

Semiconductor DRAM – 50% per year

Magnetic Disk Technology – disk density

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Consider today’s product cycle

AND market requirement

 have to design for a complexity target that can’t be

implemented until the end of the cycle

chase the trends

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Where alpha depends on the process

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

 .25u K6-2 = 68 mm2

 .25u K6-3 (256K L1) = 135 mm2

 .35u 6x86 = 169 mm2

 .25u 6x86 (64K L1) = 65 mm2

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

 .8u Pentium 60 = 288 mm2

 .6u = 306 mm2

 .35u = 205 mm2

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

 .25u PA-8500 (.5 MB IL1, 1MB DL1) = ~900 mm2

 .35u 21264 = 310 mm2

 .35u PPC 604e = 148/96 mm2

 .25u PPC 604e = 47.3 mm2

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

 best performance / cost ?

 best performance / cost ?

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Which computer has better performance?

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

instr count CPI clock rate

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Similar for throughput comparisons

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Make the Common Case Fast

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

Quantification of the diminishing return principle

Speedup due to enhancement E:

Suppose that enhancement E accelerates a fraction F of the task by

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

ExTimenew = ExTimeold x (1 - Fractionenhanced )+

Advanced Computer Architecture Summer 2006 Lecture 01 Delivered By Muddassar Farooq

ExTimenew = ExTimeold x (0.9 + .1/2) = 0.95 x ExTimeold