VHDL DATA OBJECTS

DATA OBJECTS
 A data object holds a value of a specified type.
 It is created by means of an object declaration.
 An object declaration is used to declare an object, its type, and its
class, and optionally assign it a value.
 Every data object belongs to one of the following three classes:
1. Constant: An object of constant class can hold a single value
of a given type. This value is assigned to the object before
simulation starts and the value cannot be changed during the
course of the simulation.
2. Variable: An object of variable class can also hold a single
value of a given type. However in this case, different values can be
assigned to the object at different times using a variable
assignment statement.
3. Signal: An object belonging to the signal class has a past
history of values, a current value, and a set of future values.
Future values can be assigned to a signal object using a signal
assignment statement.
 Contd…
 CONSTANT and SIGNAL can be global (i.e., seen by the whole
code), and can be used in either type of code, concurrent or
sequential.
 A VARIABLE is local, it can only be used inside a piece of
sequential code (that is, in a PROCESS, FUNCTION or
PROCEDURE) and its value can never be passed out directly.
 SIGNAL objects are typically used to model wires and flip-flops
while VARIABLE and CONSTANT objects are typically used to
model the behavior of the circuit.
 CONSTANT DECLARATIONS
 CONSTANT serves to establish default values.
 A CONSTANT can be declared in a PACKAGE, ENTITY, or
ARCHITECTURE.
 When declared in a PACKAGE, it is truly global, the package can
be used by several entities.
 When declared in an ENTITY (after PORT), it is global to all
architectures that follow that entity.
 When declared in an architecture (in its declarative part), it is
global only to that architecture’s code.
 The most common places to find a CONSTANT declaration is in an
ARCHITECTURE or in a PACKAGE.
 Syntax for CONSTANT declaration:
CONSTANT name : type := value;
 Contd…
 Examples of constant declarations are
constant RISE_TIME: TIME := 10ns;
constant BUS_WIDTH: INTEGER := 8;
 An example of another form of constant declaration is
constant NO_OF_INPUTS: INTEGER;
 The value of the constant has not been specified in this case.
Such a constant is called a deferred constant and it can appear
only inside a package declaration.
 The complete constant declaration with the associated value must
appear in the corresponding package body.
 SIGNAL DECLARATIONS
 SIGNAL serves to pass in and out the circuit, as well as between
its internal units.
 A SIGNAL represents circuit interconnects (wires).
 For instance, all PORTS of an ENTITY are signals by default.
 Syntax for SIGNAL declaration:
SIGNAL name : type [range] [:= initial value]
 Here are some examples of signal declarations.
signal CLOCK: BIT;
signal DATA_BUS: BIT_VECTOR (0 to 7);
signal GATE_DELAY: TIME := 10 ns;
 The declaration of a SIGNAL can be made in the same places as
the declaration of a CONSTANT.
 The assignment operator for a SIGNAL is “<=”
 Contd…
 A very important aspect of a SIGNAL, when used inside a section
of sequential code (PROCESS, for example), is that its update is
not immediate.
 In other words, its new value should not be expected to be ready
before the conclusion of the corresponding PROCESS,
FUNCTION, or PROCEDURE.
 Another aspect that might affect the result is when multiple
assignments are made to the same SIGNAL.
 VARIABLE DECLARATIONS
 Contrary to CONSTANT and SIGNAL, a VARIABLE represents only
local information.
 It can only be used inside a PROCESS, FUNCTION or
PROCEDURE (i.e., in sequential code), and its value can not be
passed out directly.
 On the other hand, its update is immediate, so the new value can
be promptly used in the next line of code.
 Syntax for VARIABLE declaration:
VARIABLE name : type [range] [:= initial value]
 Examples of variable declarations are
variable CTRL_STATUS: BIT_VECTOR(10 downto 0);
variable SUM: INTEGER range 0 to 100 := 10;
variable FOUND, DONE: BOOLEAN;
 CONTD…
 Since a VARIABLE can only be used in sequential code, its
declaration can only be done in the declarative part of a
PROCESS, FUNCTION, or PROCEDURE.
 The assignment operator for a VARIABLE is “:=”
 SIGNAL Vs. VARIABLE
SIGNAL VARIABLE

Assignment <= :=

Utility Represents circuit Represents local

interconnects (wires) information
Scope Can be global (seen by Local (visible only
entire code) inside the PROCESS,
FUNCTION, or
PROCEDURE)
Behavior Update is not Updated immediately
immediate in sequential
code
Usage In a PACKAGE, ENTITY, Only in sequential code,
or ARCHITECTURE i.e., in a PROCESS,
FUNCTION, or
PROCEDURE