1) What are the inputs to PD-flow(You may assume that synthesis is not part of P.D here).

Segregate them into Design related, Foundry related, IP related and Hierarchical (from
top/chip level) categories.

2) In higher technologies, mosfets exhibit greater delay at higher temperatures and in lower technologies, they exhibit lower delays at higher temperatures. Explain.

3) Among SS/0.9V/125C & FF/1.1V/125C device operating corners, at which conditions does the cell exhibit higher delay?
5) What is techfile(.tf file)? Open the tech file you used in your lab and list down the major rules given in tech file for all routing layers(M1 to M9 including vias)

6) What is tlu+ file? What information does foundry provide in this file? How does P&R tool use this data. List down atleast 3 different items that are given per routing layer and per
via layer in this file

7) Usually at which temperature are the resistivity values/resistance values given in the RC technology file(tlu plus file). If tool has to calculate resistance at a different temperature,
how does the tool do that?

7) What is .lib(or .db file you used in your lab) file? List atleast 10 different items that are defined in the lib file for any given cell. You may refer to the .lib file you referred to in the
class.

8) What is .lef file? List atleast 5 different items that are defined in the .lef file for any given cell. You may refer to the .lef file you referred to in the class.
9) What is meant by drive-strength of a cell. List down the various drive-strengths that are available for 2 input AND gates by referring to the lib/lef files you referred to in the class.

10) What do you understand by the term metal stack. Suppose you are offered the following metal stack(8M_2XA_2XB_2XC_2XD_RDL), explain what you understand looking at
the name of the stack. Explain in detail, how you would use the various metals provided here, in P&R activities.

11) What do you understand by unit tile or unit site. Suppose unit tile is given as 0.4 X 0.576, Explain what you understand from this.

12) List any 10 ICC commands you have learnt so far(you have used them while working in the lab)
Question 13)

All inputs required to implement a design are given in the below folder.
/PD2/assignments/assignment_week2 (Note that .synopsys_dc.setup file is hidden and is available here)
Use them and do the following by invoking icc_shell

1) Import the design & all inputs required to do physical design into ICC.
2) Save the milkyway database of your design with name as given below
Give Top module name for the milkyway library and give your name_step1 for cell name(for e.g. ashish_step1)
3) Now use the command “report_design –physical” in ICC and redirect(>) the report generated to reports/reportDesign.rpt.
In an A4 size paper, note down the average pins per net reported by above command.
4) Now use the command “check_design” and redirect the report generated to reports/checkDesign.rpt
In the A4 size paper, note down the number of undriven nets you see in the report generated by the above cmd.
5) Close the cell and the milkyway library and exit ICC
6) Now invoke ICC again and read back the design you saved in step 2.
7) Now save the design under the same milkyway library as in step2 but with a different cell name i.e., _step2(for e.g. ashish_step2).
8) Close the cell and milkyway libraries
9) Exit from ICC
10) Open the log files you created in above steps(2 separate files should have been created under logs directory. Write down the names of the log files that are created. List down the
sequence in which tool read the inputs you gave). Note these steps in the A4 sheet.