Lecture 8

Figure 16.
1
Switched load control
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PPTs t/a Electrical Principals for the Electrical Trades 5e by Jenneson
1
Slides prepared by Anne McLean
Figure 16.2
Rheostat load control

2
Figure 16.3
Variac power control

3
Figure 16.4 Tapped inductor
power control

4
Figure 16.5
Thyristor power control

5
Figure 16.6 Phase control
load voltage waveforms

6
Figure 16.7(a) Load waveforms
for zero voltage switching

7
Figure 16.7(b) Load waveforms

8
Figure 16.7(c) Load waveforms

9
Figure 16.8
SCR standard symbol

10
Figure 16.9 SCR case styles

11
Figure 16.10
SCR layer construction

12
Figure 16.11
SCR operation

13
Figure 16.12 SCR forward
and reverse characteristics

14
Figure 16.13 Effect of gate current
on SCR break-over voltage

15
Figure 16.14 Typical SCR
gate current pulse

16
Figure 16.15
SCR protection

17
Figure 16.16 SCR testing

18
Figure 16.17
GTO thyristor symbol

19
Figure 16.18(a) GTO thyristor
turn-on and turn-off currents

20
Figure 16.18(b) GTO thyristor
turn-on and turn-off currents

21
Figure 16.19 GTO thyristor
characteristics

22
Figure 16.20 Control of a.c.
power—inverse parallel SCRs

23
Figure 16.21 Triac layer
construction and circuit symbol

24
Figure 16.22(a,b)
Triac triggering modes

25
Figure 16.22(c,d)
Triac triggering modes

26
Figure 16.23
Triac characteristics

27
Figure 16.24
Triac protection

28
Figure 16.25(a,b) Triac testing. Note that the
triac will attempt to conduct more readily when
a voltage exists between MT1 and the gate

29
Figure 16.25(c,d) Triac testing. Note that the

30
Figure 16.25(e,f) Triac testing. Note that the

31
Figure 16.26
UJT construction and symbol

32
Figure 16.27 UJT internal
voltage drops

33
Figure 16.28 UJT emitter current

34
Figure 16.29
UJT emitter characteristic

35
Figure 16.30
UJT relaxation oscillator

36
Figure 16.31 Relaxation
oscillator waveforms

37
Figure 16.32 PUT
construction and symbol

38
Figure 16.33 PUT biasing
and current flow

39
Figure 16.34 PUT anode
characteristic

40
Figure 16.35
PUT relaxation oscillator

41
Figure 16.36 PUT oscillator
waveform

42
Figure 16.37
Diac graphical symbol

43
Figure 16.38 Diac characteristics
(symmetrical diac)

44
Figure 16.39
Diac trigger circuit

45
Figure 16.40 Diac trigger
circuit waveforms

46
Figure 16.41(a) Voltage waveforms
for a d.c. load with phase control

47
Figure 16.41(b) Voltage waveforms
for a d.c. load with phase control

48
Figure 16.42(a) Voltage waveforms
for an a.c. load with phase control

49
Figure 16.42(b) Voltage waveforms
for an a.c. load with phase control

50
Figure 16.43
RFI suppression

51
Figure 16.44 Single-phase
half-wave controlled rectifier

52
Figure 16.45 Single-phase half-wave
controlled rectifier waveforms (a = 60°)

53
Figure 16.46 Single-phase half-
controlled bridge rectifier

54
Figure 16.47 Single-phase half-controlled
bridge—modified trigger circuit

55
Figure 16.48 Single-phase half-
controlled bridge waveforms (a = 60°)

56
Figure 16.49
Triac control of a.c. loads

57
Figure 16.50 Triac control of a.c.
loads—reduced snap-on effect

58
Figure 16.51 Triac load
control—UJT triggering

59
Figure 16.52 Alternating current
controller circuit characteristic

60
Figure 16.53 Triac a.c. load controller—
diac triggering (trigger angle 45°)

61
Figure 16.54 Triac a.c. load controller—
UJT triggering (trigger angle 90°)

62
Figure 16.55 Inverse parallel SCR
load control—UJT triggering

63
Figure 16.56(a) Zero voltage
switching load voltage waveforms

64
Figure 16.56(b) Zero voltage

65
Figure 16.56(c) Zero voltage

66
Figure 16.57 Integrated
circuit zero-crossing switch

67
Figure 16.58 Temperature
variations—on/off control

68
Figure 16.59 Temperature
variations—proportional control

69
Figure 16.60
Solid state relay load control

70
Figure 16.61
Rheostat load control

71
Figure 16.62
Thyristor power control

72
Figure 16.63
PUT relaxation oscillator

73

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