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1.4 DESCRIBE INPUT / OUTPUT

DATA TRANSFER
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1. Define the asynchronous serial transfer

2. Describe the asynchronous communication
interface
3. Differentiate the characteristic between isolated
and memory mapped I/O
4. Describe mode of transfer:
• Programmed I/O
• Interrupt-initiated I/O
• Direct memory Access
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Define Asynchronous serial transfer

• Serial means sending one bit followed by another
• Parallel sending multiple bits over multiple wires
simultaneously
• Asynchronous means the sender transmit data using its
own timing source, rather than sharing a timer or clock
with the receiver.
• Asynchronous transmission provide greater autonomy
and fewer wire but receiver must know the incoming data
rate and each device must have a reasonably matching
time relative to each other.
• Asynchronous serial transfer is digital communication that
is capable of very high speeds and suitable for
transmission of image or voice or video
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1.4.1 Define the asynchronous serial transfer

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1.4.1 Define the asynchronous serial transfer

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Comparison between Asynchronous & Synchronous Communication

Characteristic Asynchronous Synchronous
Transmission Use serial Use serial
technique communication communication
Comparatives Data transmit one Data transmit block
capacity character at one (bunch of character)
time at one time
Distance long shorter
Limitation
Sync method Start and stop bit Clock speed
Comparatives Low speed due to More efficient due to
capacity serial transmission parallel transmission
Costing Simple and cheap Much cost due to
mechanism
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Asynchronous Serial Transfer

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Asynchronous Serial Transfer

• The term asynchronous is usually used to describe
communications in which data can be transmitted
intermittently rather than in a steady stream.

• For example, a telephone conversation is asynchronous

because both parties can talk whenever they like. If the
communication were synchronous, each party would be
required to wait a specified interval before speaking.

• The difficulty with asynchronous communications is that

the receiver must have a way to distinguish between
valid data and noise.
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Asynchronous Serial Transfer

• In computer communications, this is usually accomplished
through a special start bit and stop bit at the beginning
and end of each piece of data.

• For this reason, asynchronous communication is

sometimes called start-stop transmission.

• Most communications between computers and devices

are asynchronous.
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1.4.2 The asynchronous communication interface

The asynchronous communication interface
A serial asynchronous data transmission technique used in many
interactive terminals employs special bits that are inserted in both ends
of the character code. With this technique, each character consist of
three parts:
• Start bit—indicates the beginning of the data word
• Stop bit—indicates the end of the data word
• Character bit / Data bits—the actual data to be transmitted
• Parity bit- to detect error in data transmission
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The asynchronous communication

interface
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1.4.3 Differentiate the characteristic between

Isolated and memory mapped I/O
• Typically, there will be many I/O devices connected through I/O modules
to the system.

• Each device is given a unique identifier or address.

• When the processor issues an I/O command, the command contains

the address of the desired device.
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• Thus, each I/O module must interpret the address lines to

determine if the command is for itself.

• When the processor, main memory, and I/O share a

common bus, two modes of addressing are possible:
memory mapped and isolated.
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1.4.3 Differentiate the characteristic between

Isolated and memory mapped I/O

• Memory-mapped I/O (MMIO) and isolated I/O are

two complementary methods of performing
input/output between the CPU and peripheral
devices in a computer.
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1.4.3 Differentiate the characteristic between

Isolated and memory mapped I/O
• Isolated I/O: A method of addressing I/O modules and
external devices.

1. The I/O address space is

treated separately from main
memory address space.
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Isolated I/O:
2. Specific I/O machine instructions must be used.

• For instance, x86 machines have a 32-bit

address space.
• Regular instructions like MOV is for
Memory.
• The special instructions IN and OUT
access a separate 64KB I/O address
space.
• Eg: IN AL,PortA

• Address 0000FFFF could refer to either

main memory or an I/O device, depending
on what instruction was used
• MOV AL, 0FFFFh – memory
• IN AL, 0FFFFh – isolated I/O
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1.4.3 Differentiate the characteristic between

Isolated and memory mapped I/O
• Memory-mapped I/O: A method of addressing I/O
modules and external devices.

1. A single address space

is used for both main memory
and I/O addresses
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Memory-mapped I/O
2. Same machine instructions are used both for
memory read/write and for I/O.
No special commands for I/O
Same machine instructions to access memory and I/O
devices

MOV AL, 0COOOh – access I/O

MOV AL,0FFFFh -- access memory

Large selection of memory access commands available

However, part of the address space is taken by I/O

devices, reducing the amount of main memory that’s
accessible.
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1.4.3 Differentiate the characteristic between

Isolated and memory mapped I/O

Isolated I/O Memory Mapped I/O

Isolated I/O uses separate memory Memory mapped I/O uses
space. memory from the main memory.

Limited instructions can be used. Any instruction which references

Those are IN, OUT, INS, OUTS. to memory can be used.
The addresses for Isolated I/O Memory mapped I/O devices are
devices are called ports. treated as memory locations on
the memory map.
1.4.4 Describe mode of transfer

(communicate)
• Computer Main Memory, I/O devices,
peripheral devices

Interfacing needed
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1.4.4 Describe mode of transfer

Modes of Transfer
There are THREE (3) methods for managing input and output:
a) Programming I/O (also known as polling)
b) Interrupt-driven I/O
c) Direct Memory Access (DMA)

NO INTERRUPTS USE OF INTERRUPT

I/O-to-memory transfer Programmed I/O Interrupt-driven I/O
through processor
Direct I/O-to memory transfer Direct memory access
(DMA)
Think???
• Consider a computer that is playing back an mpeg file in
say media player. You click some icon on desktop and the
computer responds immediately . How does it happen??
The computer had no way of knowing when this event
would occur, but yet it deal with it.
• A computer receives input from a number of
different sources. Characters keyed in on the
keyboard, the click of a mouse, data from
scanner , data from printer. The arrival of this type
of input is not necessary expected at any
particular time and the computer has to have a
way of detecting it.
• There are two ways that this can happen,
Programming I/O (polling ) and interrupts.

• Both of these method allow the processor to deal

with events that can happen at any time and that
are not related to the process it is currently
running.
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Modes of Transfer

a) Programming I/O (also

known as polling)
Programming I/O (also known as polling)
• Programmed I/O (PIO) refers to data transfers
initiated by a CPU under driver software control to
access registers or memory on a device.

• Here the processor continuously polls or test

every device in turn as whether it requires
attention ( eg. has data to be transferred).

• The polling is carried out by a polling program

that shares processing time with the currently
running task.
• A device indicates it requires attention by
setting a bit in its device status register.

• Mostly, devices will not require attention

and when one does it will have to wait until
it next interrogated by the polling program.

• This is not insufficient method and much of

processor time is wasted on unnecessary
polls
Think???
• Compare the method to teacher continually
asking student in a class, one after another,
if they need help.

• Obviously the more efficient method would

be for a student to inform the teacher
whenever they require assistance.
• Polling is the process where the
microprocessor waits for an external
device to check for its readiness.

• The microprocessor does not do anything

else then checking the status of the device.

• Pollingis often used with low level

hardware.
Polling has disadvantage that:

1. if there are too many devices to check, the time

required to poll them can exceed the time
available to service the I/O device.

2. the processor has to wait a long time for the I/O

module of concern to be ready for either
reception or transmission of data.

3. The processor, while waiting, must repeatedly

interrogate the status of the I/O module. As a
result, the level of the performance of the entire
system is severely degraded.
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Programmed I/O (also known as polling)

• With program I/O, data are exchanged between the

processor and the I/O module.

• The processor executes a program that gives it direct

control of the I/O operation, including sensing device
status, sending a read or write command and
transferring the data.

• When the processor issues a command to the I/O

module, it must wait until the I/O operation is complete.

• If the processor is faster than the I/O module, this is

wasteful of processor time.
 Programmed I/O (Polling)
1. Processor does nothing
except polling

2. Processor executes an I/O

instruction by issuing
command to appropriate
I/O module

3. I/O module performs the

requested action and then
sets the appropriate bits in
the I/O status register
NO EXCHANGE OF CONTROL SIGNALS
 Programmed I/O (Polling)

4. I/O module takes not

further action to alert the
processor – it does not
interrupt the processor

5. The processor periodically

checks the status of the
I/O module until it
determines that the
operation is complete

NO EXCHANGE OF CONTROL SIGNALS

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Interface
i/o module
System Bus

CPU Memory I/O Module ……… I/O Module

1 n

Data transfer from or to I/O Device Device

-get / put data
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System Bus
Status Register
8 1
I/O
Status Register
‘ 0 ’ – Ready ( data is available )
‘ 1’ - Busy
Data Register/ data buffer
• Status register indicate the status
of device whether it is ready or
busy

• Data register is content of data that

will be transfer to CPU
Device
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1. CPU checks status of device by looking at status

register in I/O module. ( polling)

2. If status register of device 1 is ready (set to 0)- data will

be put into bus data and send to CPU to deal it.

3. If status register of device 1 is busy ( set to 1) – CPU

will polling other devices to check the status of devices.

4. If data is ready in data register , it can be effective data

transfer because data can be input / output depending
on what is particular task to execute.
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Modes of Transfer

b) Interrupt-driven I/O
 Simple idea
• it happens to people all time, such as
receiving a phone call when you are doing
some work.

• You deal with the interruption and then

resume with your work from where you left
off.
Interrupt –DRIVEN I/O
• Interrupt is a signal to microprocessor
from a device that requires attention.
The microprocessor will respond by setting
aside execution of its current task and deal
with the interrupting device.

• When the interrupting device has been

dealt with, the microprocessor continuous
with its original task as if had never been
interrupted
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The Interrupt-Driven I/O

1. With interrupt-driven
I/O, the CPU does not
access a device until it
needs servicing, and so
it does not get caught
up in busy-waits.

2. In interrupt-driven I/O,
the device requests
service through a
special interrupt
request line that goes
directly to the CPU.
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• The interrupt advantage:

• To ensure the I/O devices or peripheral devices

interrupting microprocessor to initiate.

• Reduce time and cost in such a way that interrupt only

occurs when microprocessor receive an interrupt signal.
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• Interrupt I/O is more efficient than programmed

I/O because it eliminates needless waiting.

• However, interrupt I/O still consumes a lot of

processor time, because every word of data that
goes from memory to I/O module or from I/O
module to memory must pass through the
processor
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Priority Interrupt
1. Priority Interrupt is a system that determine
which condition is to be services first when two
or more request arrive simultaneously.
2. Highest priority interrupt are served first.
3. Device with high speed transfer are given high
priority and slow devices such keyboards
receive low priority.
4. When 2 devices interrupt the CPU at the same
time the CPU will service the device with
highest priority first.
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Modes of Transfer

c)Direct Memory Access (DMA)

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Direct Memory Access (DMA)

A direct memory access (DMA) device can

transfer data directly to and from memory
rather than using the CPU as an intermediary,
and can thus relieve congestion on the system
bus.

In this mode, the I/O module and main

memory exchange data directly, without
processor involvement.
Direct Memory Access (DMA)
• In DMA,

Data transfer between memory peripheral

Controlled externally

Microprocessor not involved during transfer

This method used in cases where

microprocessor control too slow

DMA process requires a controlled chip – 8257

DMA controller
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Direct Memory Access (DMA)

DMA Controller
• DMA services are usually provided by DMA
controller, which is, itself a specialized
processor whose specialty is transferring
data directly to or from I/O devices and
memory.

• It takes the place of microprocessor. The

transfer directly between memory and
peripherals I/O
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Direct Memory Access (DMA)

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Diagram Modul DMA

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• The DMA module is capable of representing the

processor and taking over control of the system from the
processor. It needs to do this to transfer data to and from
memory over the system bus.

• For this purpose, the DMA module must use the bus only
when the processor does not need it, or it must force the
processor to suspend operation temporarily.

• The second technique is more common and is referred to

as cycle stealing, because the DMA module in effect
steals a bus cycle.
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• When the processor wishes to read or write a block of data, it issues a

command to the DMA module, by sending to the DMA module the
following information:

1. Whether a read or write is requested, using the read or

write control line between the processor and the DMA
module
2. The address of the I/O device involved, communicated on
the data lines
3. The starting location in memory to read from or write to,
communicated on the data lines and stored by the DMA
module in its address register

CPU DMA module

1, 2,3,4
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4. The number of words to be read or written, again

communicated via the data lines and stored in the data count
register.

The processor then continues with other work. It has given this
I/O operation to the DMA module. The DMA module transfers
the entire block of data, one word at a time, directly to or from
memory, without going through the processor.
1, 2,3,4

CPU DMA module memory

Send interrupt signal,

after complete.
When the transfer is complete, the DMA module sends an interrupt signal to
the processor. Thus, the processor is involved only at the beginning
and end of the transfer.
• Data transfer using this method is more faster
than normal method.

• The CPU would first tell the DMA controller what it

should do, and then the CPU can continue
executing other processes while the DMA
controller uses the bus

• During data transfer from peripheral , DMA

controller will control bus system.

• External peripheral, will use interrupt technique to

tell DMA controller if there are a data to be transfer
or not.