8085 Addressing Modes

 The CPU executes any program by processing (or Operating On)

ONE BYTE (8 bits) at a time.
 For processing the BYTE (OPERAND) the CPU must access the
BYTE.
 The addressing mode specifies the way in which this Operand can
be accessed by CPU.
 Immediate Addressing Mode
 Register Addressing Mode
 Direct Addressing Mode
 Indirect Addressing Mode
 Implicit Addressing Mode
 Immediate Addressing
 In this mode the Operand is given along with the Instruction itself
i.e. The Operation Code (OPCODE) is immediately followed by the
Operand.
 For 8085 CPU, the Opcode is always ONY BYTE (8 Bits) for all
instructions.
 The Operand can be ONE BYTE or TWO BYTES.
 E.g. MVI A, #9E h This is a mnemonic representation (assembly
language) of the instruction.
 CPU does not understand this. It understand hex code only.
 Hence the above instruction is coded as 3E, 9E.
 The first BYTE 3E is OPCODE and the second BYTE 9E is
OPERAND.
 Hence this instruction is a TWO BYTE instruction.
 Another example is LXI H, #45CD h
 Opcode format is 21, CD, 45 (THREE BYTE INSTRUCTION)
 Register Direct Addressing
 In this mode the Operand is available within any of the registers
of CPU. (e.g. A, B, C, D, E, H, L)
 These are mostly ONE BYTE instructions.
 The address of the concerned register/s is specified in the
OPCODE itself.
 In addition to the address of register/s the OPCODE also specifies
the OPERATION to be performed.
 E.g. MOV C, H ………. Move (copy) the data byte from H reg. to C
reg.
 Opcode is 4C & it is decoded as 0100 1100
 01 stands for MOV operation, 001 stands for destination reg. C &
100 stands for source reg. H
 Another example is ADD, B
 Opcode is 80 & it is decoded as 1000 0000
 10000 stands for ADD operation & 000 stands for source reg. B
 Register Indirect Addressing
 In this mode the address for OPERAND is specified indirectly, by a
register pair.
 E.g. LDAX, B ……… Load (copy) the ‘byte’ (8 bit data) into
accumulator from the memory location whose address (16 bit) is
given by BC pair of registers.
 Opcode is 0A & it is decoded as 0000 1010
 Another example is MOV B, M …… Move (Copy) byte from memory
location to B reg.
 The address of the memory location is given by HL pair of
registers.
 In both cases the address of the OPERAND (byte to be copied) is
not given directly in the instruction itself but is obtained by the
CPU from a specified register pair.
 Implicit Addressing
 In this mode the address of the OPERAND is IMPLICIT (granted).
 These instructions operate on the contents of the accumulator &
address of the operand need not be specified explicitly.
 E.g. RAL ….. Rotate Accumulator Left Through Carry
 CMA ….. Compliment the CONTENTS of Accumulator