PARALLEL BUS DEVICE

PROTOCOLS
PARALLEL COMMUNICATION
NETWORK USING
***ISA/EISA
***PCI/PCI-X
***ADVANCED BUSES
A computer system connects at high speed to
other subsystems having a range of IO devices.
When the IO in the distributed embedded
system are networked , all can communicate
using common parallel bus.
A parallel bus has a large number of lines as
per the protocol.
Figure shows processor of an Embedded
System ‘A’ connected to system memory bus
and networked to other subsystem using PCI
bridge and AMBA-APB bridge respectively.
We need an interconnection bus within PC or
Embedded Systems to a number of PC-Based IO
cards , systems and devices . This bus needs to be
separated from system-bus that connects the
processor to the memories.
The system bus and the interconnecting I/O bus have
to operate at different levels of speed.
ISA and EISA(Extended ISA), PCI and PCI/X buses are
the interconnection buses for communication
between host and device.
Parallel bus is a bus interconnecting the IO devices
and peripherals at high speed over short
distances.ISA & PCI are examples of parallel bus.
 ISA AND EISA BUSES
An ISA bus connects only to embedded devices
which has an 8086,80186,80286 processor.
The limitations for memory access by system using
ISA bus of original IBM PC are as follows:
ISA bus memory can be of two ranges 640Kb
to 1Mb & 15Mb to 16Mb.The former range
overlays with the range used by video boards
and BIOS.Linux OS doesnot support the
second range directly for accessing a device.
The limitations of IO port addresses for device
are as follows:
8086 & 80286 processor has IO mapped I/O’s not
memory mapped I/O’s.
Instruction set provides IO instruction for 64kb IO
addresses ,the IBM PC configuration ignores the
address lines A10 to A15 and they are not
decoded, ie. Only 1024 IO port addresses are
available [in hexadecimal nipple representation it
ranges from 00F]

Following are the addresses allocated in IBM

standard architecture(ISA)
1) Addresses from 0x000-ox00F for DMA chip.
2) 0x020 -0x021 addresses allocated for PIC 82C55.
3)0x060-0x063 for parallel port programmable
parallel interface.
4)Hex 2F8-2FF & 3F8-3FF for IBM COM ports.
5)Hex 380-389 & 3A0-3A9 for synchronous
communication.
6)Synchronous datalink control (SDLC) addresses
allocated are between hex 380-38C.
7)Hex 380-38F to display monitor ports & 3D0-
3DF for colour and graphics.
• There is a limited availability of interrupt v
ectors ,only 256 vectors are available.Interrupt
service functions are now shared at software
levels(SWI). Original ISA specification did not
allow that.
• ISA & EISA buses are compatible with IBM
architecture.They are used to connect devices
following IO addresses and interrupt vectors
as per IBM PC architecture.
• EISA is 32 bit extension of ISA, it also supports
interrupt functions and ethernet devices.
 PCI [Peripheral component interconnect] &
PCI/X Buses
• PCI is widely used synchronous parallel bus in
computer system for interfacing I/O devices.
• It is platform independent unlike the ISA
which depends on IBM PC platform, interrupt
vectors ,I0 address and memory allocations.
• PCI is a parallel synchronous I/O bus.
• PCI switch(bridge) communicates with
memory through a memory bus.
• A separate IO bus connects the switch to the
device.
• Separate memory & IO buses are used because the
IO system is usually designed with maximum
flexibility to allow many different I/O devices as
possible to interface to the system while the memory
bus is designed to provide maximum possible
bandwidth between the processor and the memory
system.
• PCI devices identifies its devices by three
identification number
• 1)IO port
• 2)memory location
• 3)configuration register of total 256 B with 4 byte
unique ID.
• Each PCI device has address space allocation of 256
bytes to access it by the host computer, Unique
feature is its configuration address space.
• PCI devices when interrupted handles the interrupt
of type n(PCI). The PCI device has 64 bytes standard
configuration registers.
• The PCI drivers can access the hardware
automatically as well as by the programmer assigned
addresses.The PCI feature of automatically detecting
the interfacing systems for assigning new address is
important for coding a device driver. The PCI bus
hence simplifies addition and deletion of system
peripherals.
• The PCI device can initialise at booting time
that helps in avoiding any address collision. A
PCI device on boot up disables its interrupts.
• Its address space is inaccessible and only
configuration register space remains
accessible.
• PCI parallel bus is popular in distributed
embedded devices.PCI & PCI/X buses are used
and there are independent from IBM
architecture.
• PCI/X is an extension of PCI & supports
64/100MHz transfers.
 ADVANCED PARALLEL HIGH SPEED BUSES
• The buses discussed above may not have
sufficient high speed, ultra high speed and
large bandwidth that are required for routers,
LAN’s ,switches and gateways and other
products.
• An embedded system may need to connect IO
system using gigabit parallel synchronous
interface.
• The following are advanced bus standard &
proprietary protocols developed recently:
1) GMII(Gigabit ethernet MAC interchange
interface)
2) XGMI(10 Gigabit ethernet MAC interchange
interface)
3) CSIX-1.6.6 Gbps 32 bit HSTL with 200 Mhz
performance.