BJT Fabrication

 BJT can be made either as discrete devices

or in planar integrated form.
 In discrete, the substrate can be used for one
connection, typically the collector.
 In integrated version, all 3 contacts appear
on the top surface.
 The E-B diode is closer to the surface than the
B-C junction because it is easier make the
havier doping at the top.
 BJT Structure - Discrete

 Early BJTs were fabricated using alloying - an complicated

and unreliable process.
 The structure contains two p-n diodes, one between the
base and the emitter, and one between the base and the
collector.
BJT Structure - Planar

The “Planar Structure” developed by

Fairchild in the late 50s shaped the basic
structure of the BJT, even up to the present
day.

 In the planar process, all steps are performed

from the surface of the wafer
 BJTs are usually constructed vertically
 Controlling depth of the emitter’s n doping sets the
base width

E B C

n
p

n
Advanced BJT Structures
 The original BJT structure survived, practically
unchanged, since the mid 60’s.
 As the advances in MOS development appears,
some of the fabrication technology are also applied
to the BJT.
 Low defect epitaxy
 Ion implant
 Plasma etching (dry etch)
 LOCOS (local oxidation of Si)
 Polysilicon layers
 Improved lithography
 3.1 Introduction to Device Fabrication

Oxidation

Lithography &
Etching

Ion Implantation

Annealing &
Diffusion
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-6
 3.2 Oxidation of Silicon

Quartz tube

Si Wafers

Flow
controller

H 2O or TCE(trichloroethylene) Resistance-heated furnace

O2 N2

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Slide 3-7
 3.2 Oxidation of Silicon
Si + O2  SiO2
Dry Oxidation :
Si +2H2O  SiO2 + 2H2
Wet Oxidation :

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Slide 3-8
 3.3 Lithography
(a) Resist Coating (c) Development
Positive resist Negative resist
Photoresist

Si Oxide

(b) Exposure Si Si

Deep Ultraviolet Light (d) Etching and Resist Strip

Optical Photomask with
Lens system opaque and
clear patterns

Si Si

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Slide 3-10
 3.3 Lithography

Wafers are being loaded into a stepper in a clean room.

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Slide 3-13
 3.3.1 Wet Lithography

Photo Mask

Water
Photoresist
Wafer

(a) (b)
conventional dry wet or immersion

lithography 
lithography

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Slide 3-14
 Extreme UV Lithography (13nm wavelength)
Reflective “photomask”

Laser produced
plasma emitting
EUV

No suitable lens material at this

wavelength. Optics is based on mirrors
with nm flatness.

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Slide 3-15
 3.7.1 Sputtering
Schematic Illustration of Sputtering Process

Sputtering target

Ion (Ar +) Atoms sputtered out of the target

YY Y

Target material
YY deposited on wafer
YYYYY YY YYY YYYYYYYY
YYYYYYYY YYYYYY YYYY YYYYYY
YYYYYYYY YYYYYY YYYYYYYYYYYY
YYYYYYYY YYYYYY YYYYYYYYYYYY YY
Y YYYY
YYYYY YYYYYYY YYYYYYY
YYYY
YY YYYYYY YYYYYYY
YY YYYY YYYYYYYY
YYYYYYYYYYYY
YYY YYYYYY
Y YY

Si Wafer

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Slide 3-16
 3.7.2 Chemical Vapor Deposition (CVD)

Thin film is formed from gas phase components.

Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-17
 3.7.2 Chemical Vapor Deposition
(CVD)

Two types of CVD equipment:

• LPCVD (Low Pressure CVD) : Good uniformity.

Used for poly-Si, oxide, nitride.

• PECVD (Plasma Enhanced CVD) : Low temperature

process and high deposition rate. Used for oxide,
nitride, etc.

Modern Semiconductor Devices for Integrated Circuits (C. Hu)

Slide 3-18
 3.7.2 Chemical Vapor Deposition
(CVD)
Pressure sensor Resistance-heated furnace
Quartz tube
Trap
To exhaust
Si Wafers

Pump
Source
gases
Gas control
system
LPCVD Systems
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-19
 3.7.2 Chemical Vapor Deposition
(CVD)

Cold Wall Parallel Plate

Gas Injection Wafers

Ring
Pump
Heater Coil
Wafers

Gas Pump
Hot Wall Parallel Plate Inlet
Power leads

Plasma Electrodes

PECVD Systems
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-20
3.7.3 Epitaxy (Deposition of Single-Crystalline
Film)
Epitaxy Selective Epitaxy
SiO 2 SiO2

Si Substrate Si Substrate

Epi film SiO 2 Epi film SiO2

Si Substrate Si Substrate

(a) (b)
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-21
 P-Si

3.10 Chapter Summary–A

(3) Device
SiO Fabrication
SiO 2 2
(11)
P-Si
Example
Arsenic implantation SiO
(4) Ion
(0) P-Si (8)SiO Al
Wafer 2
S iO2 SiO2 S iO
2
Implantatio
P-Si N+ n
SiO2 P (12)
(1)
P-Si SiO 2 SiO2
Oxidation (5) (9) N+
SiO2 Si3 N4 Annealing & SiO
P Al
SiO2 SiO Diffusion
UV N+
2

UV (6) Al
SiO2 P2
SiO
(2) N+
M ask Al
(10) PSi
3 N4 Sputtering
Positive resist Al (13) Si
SiO2 UV
SiO2 UV SiO2
Lithography N+ SiO2
P-Si M as k P
SiO2 SiO2 (7) (11)Res is t Photoresist
(3) Al Al
P-Si SiO2 SiO2
Etching NSi
+ 3 N4

Arsenic implantation P Al
SiO2 SiO 2
N+
(4) Lithography
SiO2 SiO2 P

P-Si
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-24 (12) Si3 N4
SiO 2 SiO2 Al
 (3) SiO2 SiO2 Photoresist
P-Si
Si3 N4
3.10 Chapter
Arsenic implantationSummary–A SiO
Device Fabrication
Al
SiO 2 2

(4) Example P
N+

SiO2 SiO2

P-Si Al
Metal (8) S iO2 S iO2
N+ (12) Si3 N4 Back side
etching SiO SiO2 Al
(5)
2

N+ P metallizatio
SiO2 SiO 2
P N+
n
CVD (9) Si3 N4 P
Al
nitride
(6) Al SiO2 SiO2
deposition SiO 2 N SiO2
+ Au
N+ P
P wire
(10) Si3 N4 (13) Si3N 4
Lithography UV Al Al
and etching SiO2 SiO2 SiO2 SiO2
M as kN
+
+
N
P P
(7) Res is t
(11) Al
2 Photoresist Al
Au
SiO2 SiO2
SiN3 N4
+
Plastic package
Back Side P Al
milling SiO2 SiO 2 metal leads
N+

2
P Dicing, wire bonding,
and packaging
(12) Si3 N4
Modern Semiconductor
Al Devices for Integrated Circuits (C. Hu)
SiO2 SiO 2 Slide 3-25
N+
Band Diagrams (Active Mode)
 EBJ forward biased
 Barrier reduced and so electrons diffuse into the base
 Electrons get swept across the base into the collector
 CBJ reverse biased
 Electrons roll down the hill (high E-field)
Emitter Base Collector

Ec

Ef

Ev
N P N
 Minority Carrier Concentration Profiles

 Current dominated by electrons from emitter to base (by design) b/c of the
forward bias and minority carrier concentration gradient (diffusion) through
the base
 some recombination causes bowing of electron concentration (in the base)
 base is designed to be fairly short (minimize recombination)
 emitter is heavily (sometimes degenerately) doped and base is lightly doped
 Drift currents are usually small and neglected
Diffusion Current Through the Base

 Diffusion of electrons through the base is set by concentration profile at the EBJ

 Diffusion current of electrons through the base is (assuming an ideal straight line
case):

 Due to recombination in the base, the current at the EBJ and current at the CBJ are
not equal and differ by a base current
Collector Current
 Electrons that diffuse across the base to the CBJ junction are swept across
the CBJ depletion region to the collector b/c of the higher potential applied
to the collector.

 Note that iC is independent of vCB (potential bias across CBJ) ideally

 Saturation current is
 inversely proportional to W and directly proportional to AE

 Want short base and large emitter area for high currents
2
 dependent on temperature due to ni term
Collector Current
 Electrons that diffuse across the base to the CBJ junction are swept across
the CBJ depletion region to the collector b/c of the higher potential applied
to the collector.

 Note that iC is independent of vCB (potential bias across CBJ) ideally

 Saturation current is
 inversely proportional to W and directly proportional to AE

 Want short base and large emitter area for high currents
2
 dependent on temperature due to ni term
Collector Current
 Electrons that diffuse across the base to the CBJ junction are swept across
the CBJ depletion region to the collector b/c of the higher potential applied
to the collector.

 Note that iC is independent of vCB (potential bias across CBJ) ideally

 Saturation current is
 inversely proportional to W and directly proportional to AE

 Want short base and large emitter area for high currents
2
 dependent on temperature due to ni term
Base Current
 Base current iB composed of two components:
 holes injected from the base region into the emitter region

 holes supplied due to recombination in the base with diffusing electrons

and depends on minority carrier lifetime tb in the base

And the Q in the base is

So, current is

 Total base current is

Beta
 Can relate iB and iC by the following equation

and b is

 Beta is constant for a particular transistor

 On the order of 100-200 in modern devices (but can be higher)

 Called the common-emitter current gain

 For high current gain, want small W, low NA, high ND

Emitter Current

 Emitter current is the sum of iC and iB

a is called the common-base current gain

I-V Characteristics
IC
IC VBE3

VCE VBE2
VBE
VBE1
VBE3 > VBE2 > VBE1

VCE

 Collector current vs. vCB shows the BJT looks like a

current source (ideally)
 Plot only shows values where BCJ is reverse biased and so BJT
in active region
 However, real BJTs have non-ideal effects
I-V Characteristics

Base-emitter junction looks Collector-emitter is a family of

like a forward biased diode curves which are a function of
base current.
I-V Characteristics
Example:

 Calculate the
values of β
and α from the
transistor
shown in the
previous
graphs.
 Early Effect
Saturation region
Active region VBE3

VBE2

VBE1

-VA VCE

 Early Effect
 Current in active region depends (slightly) on vCE
 VA is a parameter for the BJT (50 to 100) and called the Early voltage
 Due to a decrease in effective base width W as reverse bias increases
 Account for Early effect with additional term in collector current equation
 Nonzero slope means the output resistance is NOT infinite, but…
 IC is collector current at the boundary of active region
Early Effect
 What causes the Early Effect?
 Increasing VCB causes depletion region of CBJ to grow and
so the effective base width decreases (base-width
modulation)
 Shorter effective base width  higher dn/dx
EBJ CBJ

dn/dx
VCB > VCB

Wbase
Common-emitter

It is called the common-emitter configuration because (ignoring the

power supply battery) both the signal source and the load share the
emitter lead as a common connection point.
Common-collector

It is called the common-collector configuration because both the signal

source and the load share the collector lead as a common connection
point. Also called an emitter follower since its output is taken from the emitter
resistor, is useful as an impedance matching device since its input impedance is
much higher than its output impedance.
Common-base

This configuration is more complex than the other two, and is less
common due to its strange operating characteristics.
Used for high frequency applications because the base separates the
input and output, minimizing oscillations at high frequency. It has a high
voltage gain, relatively low input impedance and high output impedance
compared to the common collector.
Collector Resistance, rC
Emitter Resistance, rE
Base Resistance, rB

 Mainly effects small-signal and transient

responses.
 Difficult to measure since it depends on bias
condition and is influenced by rE.
 In the Ebers-Moll model (SPICE’s default
model for BJTs), rB is assumed to be
constant.
Breakdown Voltages

 The basic limitation of the max. voltage in a transistor is

the same as that in a pn junction diode.
 However, the voltage breakdown depends not only on
the nature of the junction involved but also on the
external circuit arrangement.
 In Common Base configuration, the maximum voltage
between the collector and base with the emitter open,
BVCBO is determined by the avalanche breakdown
voltage of the CBJ.
 In Common Emitter configuration, the maximum voltage
between the collect and emitter with the base open,
BVCEO can be much smaller than BVCBO.
Breakdown Voltages
Breakdown Voltages
Breakdown Voltages
BJT Analysis

 Here is a
common
emitter BJT
amplifier:
 What are the
steps?
Input & Output

 We would want to know the collector current (iC),

collector-emitter voltage (VCE), and the voltage across
RC.
 To get this we need to fine the base current (iB) and the
base-emitter voltage (VBE).
Input Equation

 To start, let’s write Kirchoff’s voltage law (KVL)

around the base circuit.
Output Equation

Likewise, we can write KVL around the collector

circuit.
Use Superposition:
DC & AC sources
 Note that both equations are written so as to calculate the
transistor parameters (i.e., base current, base-emitter voltage,
collector current, and the collector-emitter voltage) for both the
DC signal and the AC signal sources.
 Use superposition, calculate the parameters for each separately,
and add up the results:
 First, the DC analysis to calculate the DC Q-point

 Short Circuit any AC voltage sources

 Open Circuit any AC current sources
 Next, the AC analysis to calculate gains of the amplifier.
 Depends on how we perform AC analysis
 Graphical Method
 Equivalent circuit method for small AC signals
BJT - DC Analysis

 Using KVL for the input and output circuits

and the transistor characteristics, the
following steps apply:
1. Draw the load lines on the transistor characteristics
2. For the input characteristics determine the Q point for
the input circuit from the intersection of the load line
and the characteristic curve (Note that some transistor
do not need an input characteristic curve.)
3. From the output characteristics, find the intersection of
the load line and characteristic curve determined from
the Q point found in step 2, determine the Q point for
the output circuit.
Base-Emitter Circuit Q point

The Load Line

intersects the
Base-emitter
characteristics
at VBEQ = 0.6 V
and IBQ = 20 µA
Collector-Emitter Circuit Q point

Now that we have

the Q-point for the
base circuit, let’s
proceed to the
collector circuit.

The Load Line intersects the Collector-emitter characteristic, iB = 20 µA at

VCEQ = 5.9 V and ICQ = 2.5mA, then β = 2.5m/20 µ = 125
BJT DC Analysis - Summary
 Calculating the Q-point for BJT is the first step in
analyzing the circuit
 To summarize:
 We ignored the AC (variable) source
 Short circuit the voltage sources
 Open Circuit the current sources
 We applied KVL to the base-emitter circuit and using load line
analysis on the base-emitter characteristics, we obtained the
base current Q-point
 We then applied KVL to the collector-emitter circuit and using
load line analysis on the collector-emitter characteristics, we
obtained the collector current and voltage Q-point
 This process is also called DC Analysis
 We now proceed to perform AC Analysis
BJT - AC Analysis

 How do we handle the variable source Vin(t) ?

 When the variations of Vin(t) are large we will
use the base-emitter and collector-emitter
characteristics using a similar graphical
technique as we did for obtaining the Q-point.
 When the variations of Vin(t) are small we will
shortly use a linear approach using the BJT
small signal equivalent circuit.
BJT - AC Analysis

 Let’s assume that Vin(t) = 0.2 sin(ωt).

 Then the voltage sources at the base vary from a
maximum of 1.6 + 0.2 = 1.8 V to a minimum of 1.6 -
0.2 = 1.4 V
 We can then draw two “load lines” corresponding
the maximum and minimum values of the input
sources
 The current intercepts then become for the:
 Maximum value: 1.8 / 50k = 36 µA
 Minimum value: 1.4 / 50k = 28 µA
AC Analysis Base-Emitter Circuit

Note the asymmetry around the Q-

From this graph, we find:
point of the Max and Min Values for
At Maximum Input Voltage: the base current and voltage which
VBE = 0.63 V, iB = 24 µA is due to the non-linearity of the
At Minimum Input Voltage: base-emitter characteristics
VBE = 0.59 V, iB = 15 µA
Recall: At Q-point: ∆iΒmax = 24-20 = 4 µA;
VBE = 0.6 V, iB = 20 µA ∆iBmin = 20-15 = 5 µA
AC Analysis Base-Emitter Circuit
AC Characteristics-Collector Circuit

Using these max and min values for the base current on the collect
circuit load line, we find:
At Max Input Voltage: VCE = 5 V, iC = 2.7mA
At Min Input Voltage: VCE = 7 V, iC = 1.9mA
Recall: At Q-point: VCE = 5.9 V, iB = 2.5ma
AC Characteristics-Collector Circuit
BJT AC Analysis - Amplifier Gains

From the values calculated from the base and

collector circuits we can calculate the amplifier gains:
BJT AC Analysis - Summary

 Once we complete DC analysis, we analyze the

circuit from an AC point of view.
 AC analysis can be performed via a graphical
processes
 Find the maximum and minimum values of the input
parameters (e.g., base current for a BJT)
 Use the transistor characteristics to calculate the output
parameters (e.g., collector current for a BJT).
 Calculate the gains for the amplifier
The pnp Transistor

 Basically, the pnp transistor is similar to the

npn except the parameters have the opposite
sign.
 The collector and base currents flows out of the
transistor; while the emitter current flows into the
transistor
 The base-emitter and collector-emitter voltages
are negative
 Otherwise the analysis is identical to the npn
transistor.
The PNP Transistor

Current flow in a pnp transistor biased to operate in the active

mode.
The pnp Transistor

 Two junctions
 Collector-Base and Emitter-Base

 Biasing
 vBE Forward Biased

 vCB Reverse Biased

 IE IC

Input E pnp C Output

p+ n p circuit circuit (c)
B I
(a) B

Emitter Base Collector

E B C VEB V CB
E E B C
x
E
pn(0)
IE IC Electron
pn(x) IE Diffusion IC
Hole
np(0) Hole diffusion d ri f t

(b) np(x) pno

npo Re c obi nat ion
(d)
W EB WB W BC Ele c trons Leakage current
IB V CB
V EB

IB
(a) A schematic illustration of pnp BJT with 3 differently doped regions. (b)
The pnp bipolar operated under normal and active conditions. (c) The CB
configuration with input and output circuits identified. (d) The illustration of
various current component under normal and active conditions.
The pnp Transistor

Current flow in an pnp transistor biased to operate in the

active mode.
The pnp Transistor

Two large-signal models for the pnp transistor operating in

the active mode.