Need for Data Transfer

• Wide variety of I/O devices, have wide ranges of speed.

• A slow responding I/O device cannot respond

immediately, as soon as the microprocessor issues
instruction for it, but takes some time to get ready.

• Usually the transfer rates of peripherals is usually

slower than the transfer rates of CPU.

• Also, Mode of operation of peripherals are different

from each other, and should not disturb each other.
 Data transfer(Distance)
PARALLEL MODE :
In a parallel mode, the entire word is
transferred at one time.
e.g. LEDs, Keyboards, Memory

SERIAL MODE:
In serial Mode, data are transferred one bit
at a time over a single line between Mp &
peripheral.
e.g. CRT terminals, Printers, Modems
 Data transfer (Control)
Microprocessor Controlled/Based:
• Data transfer is controlled by microprocessor.
• Microprocessor is responsible for data transfer
whether from CPU to memory or vice versa.
IO Device Controlled/Based:
• Data transfer is controlled by IO device.
• Data is transferred between IO device and
Memory without the intervention of MP(CPU)
Microprocessor Based IO Control

Programmed IO

Interrupt Based IO
 Programmed IO control
• Data transfer is controlled by the user program
that is executed.

• The microprocessor issues the read/write

instruction addressing the device whenever the
data transfer is required.

• Depending upon the type of device, data transfer

may be synchronous or asynchronous.
 Data transfer (Clock speed)
Synchronous Data transfer :
• Synchronous means “at the same time”.
• Transmitter and Receiver are synchronised
with the same Clock pulse.
• This type of data transfer is used between
devices which match in speed.
E.g. Memory and Microprocessor
 Data transfer (Clock speed)
Asynchronous Data transfer:
• Asynchronous means “at a regular interval”.
• This type of data transfer is used between
devices that generally don't match in speed.
• Transmitter and Receiver are synchronised
with the same Clock pulse.
• In this method, the status of IO device is
checked before data is transferred.
E.g. Microprocessor and IO devices
 Interrupt IO
• Programmed IO scheme is inefficient !!
 since the microprocessor is kept busy for
slower device most of the time??

Remedy :
Allow Microprocessor to do its job, when the IO
device gets ready, it can interrupt/ disturb the
microprocessor.
Interrupt operation
 Sequence for Interrupt operation

• In Interrupt IO data transfer scheme, the

microprocessor initiates the device.
• When the device is ready to transmit or receive it
sends an interrupt request signal.
• The microprocessor completes the current
instruction execution an then suspends the current
job, saves the address and current status in stack and
then executes the Instruction service Routine (ISR).
• On Completion of data transfer, the microprocessor
retrieves the status of suspended job and restarts
the operation.
 Sequence for Interrupt operation
• Normal program execution by microprocessor
• Microprocessor initiates the device through
code/signal (e.g. ADC == SOC signal)
• The device when ready, requests the microprocessor
by sending a request signal.
• The microprocessor checks the validity of the
interrupt request by checking whether
a) the interrupt system is enabled
b) the particular interrupt is not disabled
c) any higher priority interrupt is pending or
being processed
• If the interrupt is valid, the microprocessor
a) completes the current instruction execution
b) saves the status register and PC in stack
c) Issues Interrupt acknowledgment signal
d) Determines the address of ISR and stores the
starting address in PC, thus program branches
to ISR.
Interrupt Data Transfer

The last instruction of ISR is “RETURN”.

When this Instruction is executed, the PC and the Status
Register are loaded back from stack.

This Normal program execution is resumed.

 Device based control (DMA)
• In programmed and Interrupt IO, data is transferred
through the Accumulator ( A register)
• But this process is uneconomical for Bulk data transfer,
when IO device matches the speed of microprocessor.
• In such cases the device is directly allowed to transfer
data to Memory bypassing the microprocessor.
• The IO device requests the microprocessor for Direct
Memory Access (DMA).
• The microprocessor acknowledges and disconnects itself
from Memory and IO device by tristating the address,
data and control bus.
Sequence taking place in case of DMA
 Serial Data transfer
• When the distance between the MP and IO devices
are more than few feet, then the data transfer
between them should be in serial mode.
• The data is transferred bit by bit on a single line.
• This minimizes the number of interconnecting wires.
• Serial data transfer will have two pins :
a) Input the serial data
b) Output the serial data