Computer Organization and Assembly

Language Programming

Lecture-1

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 Course Introduction

This course is design to understand the basics

organization of computers

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 Basic Computer Organization

Processor Memory

I/O

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 Basic Computer Organization

Processor Memory Data

Operation

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 Basic Computer Organization

Processor Memory Data

Operation

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 CPU
Central Processing Unit

 Brain of computer

 Control all the operations of computer

 Also called microprocessor or processor

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 Basic Components of CPU
Arithmetic and Logic Unit
Control Unit
Register
Cache Memory
Internal Buses

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 Arithmetic & Logic Unit

Main processing unit of CPU

Performs arithmetic & Logic operations

 Arithmetic ( add, sub, mul, div)

 Give result

 Result store in registers

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 Control Unit
Manage the functions performed by
different parts of computer
 E.g. Brain control all parts of body
Execute programme instruction
 Control & direct the input
 Inform ALU for processing

 Arrange the storage

 Direct the date to the output device

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 Register
Temporary storage area within CPU
Store the information being processing
Top of the memory hierarchy
Fast speed
Different size ,8 bits, 16 bits and 32 bits
Different registers
 General purpose
 Special purpose
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 Cache Memory

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 Cache Memory
Small and very fast memory
Speed up the transfer of data
Faster than RAM
Most recently or more frequently used data
and instructions store
Also called high speed buffer or chip
memory

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 Cache types
Level 1 Cache:
 Also called primary or internal cache
 Built directly into the processor chip
 Capacity 8 KB to 128 KB
Level 2 Cache:
 Slower than level 1 cache
 512 KB to 12MB

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 Cache types
Level 3 Cache:
 Separate from the processor chip
 Fixed on motherboard

 Slower than L1 and L2 cache

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 Buses (Structure)
Control Bus

Data Bus

Processor Address Bus

Memory

Control Bus

I/O

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 Buses (Structure)
Three types of bus
 Data Bus
 Address Bus

 Control Bus

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 Data bus
Bi directional
Half duplex way
Handle transfer of data and instructions
Transfer the instruction from memory to
CPU for execution
Also transfer data b/w memory & I/O
Typical data bus is 32 bits, 64bits or more
(i.e. 32 bit/s)
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 Address Bus
Carry address not data
Before data or instructions read or write to
the memory by CPU or I/O an address must
be transfer to memory by address bus

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 Control Bus
Used to direct and monitor the actions of
functional areas of computer
Transmit verity of individual signal
 E.g. read, write, interrupt, acknowledge
Size is 8 to 16 bits

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 Basic Computer Organization

Address Bus

Data Bus
Processor Memory
Control Bus

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 Dimensions of Memory
Horizontal Dimensions = Width of Memory Cell

00000000
00000001
Binary Vertical
Dimensions

Addresses
=

Of
Size of
00100011
Memory Memory

00100100
Cells 00100101
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 Basic Computer Organization

Processor Memory
Control Bus

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 End of Lecture

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