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8051 architecture
System overview of C8051F020
8051 instruction set
System clock, crossbar and GPIO
Assembler directives
Programming using C language
Interrupts
Timer operations and programming
Serial communication
DAC and comparator
ADC
2
Course Syllabus
Lecture Tutorial
Topic Questions Lab number and Topic Language
1 Course overview and 8051 architecture 1
2 System overview of C8051F020 2 0. Prelab: Working with the tools
3 Toolstick Platform Overview
4 8051 Instruction Set 3
5 System Clock, Crossbar, and GPIO 4 1. Blinky (no timers) Assembly
6 Assembler Directives 5 2. 16x16 Multiply Assembly
7 Programming using C Language 6 3. Blinky (no timers) C
8 Interrupts 7
9 Timer Operations and Programming 8 4. Blinky (timer with ISR) Assembly
5. Blinky (timer with ISR) and
other timer operations C
6. Switch debouncing C
10 Serial Communication 9 7. Serial Communication and LCD C
11 DAC and Comparator 8. Analog Comparators C
9. DAC C
12 ADC 10 10. ADC C
4
Course Prerequisites
5
The 8051 Architecture
Microprocessors and microcontrollers
Memory organization
6
Microprocessors and Microcontrollers
7
Terminology
“n-bit” – the “n” refers to the data bus width of the CPU, and
is the maximum width of data it can handle at a time
Examples: 8-bit MCU, 32-bit MCU
8
Microcontroller Architectures
9
The 8051 Microcontroller—A Brief History
10
Is 8-bit Still Relevant?
“n-bit” – the “n” refers to the data bus width of the CPU, and
is the maximum width of data it can handle at a time
PCs with 64-bit microprocessors are becoming common
Over 55% of all processors sold per year are 8-bit
processors, which comes to over 3 billion of them per year!*
8-bit microcontrollers are sufficient and cost-effective for
many embedded applications
More and more advanced features and peripherals are
added to 8-bit processors by various vendors
8-bit MCUs are well-suited for low-power applications that
use batteries
11
Example System: RC Car
Antenna Antenna
Front Electric
Forward RF RF Receiver Microcontroller
Microcontroller Motor (Left/Right)
Transmitter
Reverse
12
Block Diagram of the Original 8051
/INT0 /INT1 T0 T1
Other
interrupts
8051 CPU
From Crystal
Oscillator or RC ALE /PSEN P3 P2 P1 P0 TxD RxD
network (Address/data)
13
Block Diagram of the Silicon Labs 8051
14
Harvard and von Neumann Architectures
15
MCU Fetch-Execute Cycle
Fetch operation—retrieves
an instruction from the Program
Counter
location in code memory (PC)
pointed to by the program
counter (PC)
+
F
Execute operation— e
Code Memory t
executes the instruction c
that was fetched during the h
fetch operation. In addition CPU
to executing the instruction,
the CPU also adds the
appropriate number to the To other
peripherals
PC to point it to the next
instruction to be fetched.
16
8051 and 8052
17
C8051F020 Data Memory (RAM)
Internal Data Memory space is
divided into three sections
Lower 128
Upper 128
Special function register (SFR)
18
Lower 128—Register Banks and RAM
General
Purpose RAM
(80 bytes)
Bit-addressable
Area (16 bytes)
Register Banks
(8 bytes per
bank; 4 banks)
19
Special Function Registers (SFRs)
20
Summary of SFRs
Accumulator (ACC) and B register
ACC (also referred to as A) is used implicitly by several instructions
B is used implicitly in multiply and divide operations
These registers are the input/output of the arithmetic and logic unit (ALU)
Stack pointer—SP
Data pointer—DPTR (DPH and DPL)
16-bit register used to access external code or data memory