Core-Based DFT Advantages

• Quality
– Address voltage drop issue by reducing overall switching activity
during test
– Increases test quality by ensuring each core is tested with guaranteed
coverage at top-level
– Allows different cores to be tested under different test conditions

• Productivity
– Results in more deterministic schedule by eliminating last minutes
issues that often trigger full chip iterations
– Lowers test cost by reducing overall vector count and potentially faster
shift speed
– Provides better post-silicon debug resolution
– Provides framework to adopt different DFT solutions for targeted cores
Context
• By the end of this set of slides, reader should
– Have a general idea of chip-level CBDFT architecture
– Know the steps performing CBDFT implementation at chip-level
– Know the steps of static & transition-test ATPG at chip-level
targeting all CBDFT partitions
Training Outline:

• CBDFT Architecture Overview 

• CBDFT Top-level Flow Setup
• CBDFT Chip-level Implementation and FV
• CBDFT Chip-level Static ATPG
• CBDFT Chip-level Transition-Test/Path-Delay ATPG
CBDFT Architecture Overview

• Chip is carved into DFT regions, each region is a CBDFT

partition
– CBDFT HM/softcores
– CBDFT hierarchical cores
– Chip top
• Scan Test to be done on each partition individually &
sequentially using full SI/SO bandwidth
– Chip-level SI ports (reused gpios) fanout to all partition-level SI pins
– Chip-level SO ports (reused gpios) are XOR’ed outputs of partition-
level SO pins
• Pipeline inserted to enable fast shift
– Core pipes embedded inside each CBDFT core
– Local pipes on SI/SO edge of CBDFT partitions
– Global pipes next to SI/SO pads (reused gpios)
• All partitions are programmed through JTAG bits called
core-test control module (CTCM)
CBDFT Architecture Overview
gpios reused as scan_in

28

Global inpipe

28
TDI
Inpipe/updt stg

28 28 28

Pipe/updt
Inpipe/updt stg Inpipe/updt stg Inpipe/updt stg

CBDFT CBDFT Parent CBDFT CBDFT

Top

UNCOMP CHAIN
Core Core CBDFT Core Core
CBDFT
core
Partition
logic

XOR Local outpipe Local outpipe Local outpipe

CTCM jtag chain

pipe
Local outpipe 28 28 28

28

XOR
TDO

Global outpipe
28

gpios reused as scan_out

CBDFT Architecture Overview

Core 1
Core 2
Core 3
Core 4
Core 5
Core 6
Core 7
Core 8
Core 1
Core 2
Core 3
Core 4
Core 5
Core 6
Core 7
Core 8
0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0

Core 1

Core 5
Core 1

Core 1

Core 5
Core 1

Core 1 Core 1 xor Core 5

Core 1 and Core 5 are tested

Core 1 is selected to be tested
with 2x more compression
CBDFT Architecture Overview
CBDFT core:
Part of
scan_in CTCM
[bus] pipe
propg si/so decode
line
edt_clock
edt_update

ib chains ob chains
Edt (lfsr, controller, etc)

ib_scan_in ob_scan_in
[bus] [bus]

Small Small
Combo Combo
logic logic

Wrapper cells
Func. are auto- Func.
Input
Ports
inserted at Output
gate-level by Ports
script-ware

Comb logic Comb logic

Clock and reset ports

omitted

ib_scan_out ob_scan_out
[bus] [bus]
compressor
Edt (compactor)
scan_en_ib scan_en_ob
ctcm_ib_isolate_tdr scan_en_int ctcm_ob_isolate_tdr
ctcm_compress_en_tdr
ctcm_toptest_en_tdr
ctcm_test_mode_tdr
ctcm_*_cgc_atpg_ctrl

Part of CTCM
Propg si/so decode

Scan_out_feedin pipe Scan_out

[bus] line [bus]

so_core_pipe_clk

Created and inserted

Core Test Control Module (CTCM)
by flow automatically
Jtag interface ports
CBDFT Architecture Overview

tcb_jtag_tck
tap_cbdft_setup_chn_async_reset
tap_cbdft_setup_chn_shift
tap_cbdft_setup_chn_bsen
tap_cbdft_setup_chn_update
tap_cbdft_setup_chn_in
tap_cbdft_setup_chn_out tap_atpg_shift

CBDFT CORE

Core Test Control Module core logic

(CTCM) Power-on
default scan_en_ib
1
0
Bit 0: scan_en_ib_intern_val 0

Bit 1: scan_en_ib_extern_drv_en 0 scan_en_ob

1
Bit 2: scan_en_ob_intern_val 0 0

Bit 3: scan_en_ob_extern_drv_en 0 scan_en_int

1
0
Bit 4: scan_en_int_intern_val 0

Bit 5: scan_en_int_extern_drv_en 0

Bit 6: compress_en 0 Go to (de)compressor

Bit 7: toptest_en 0 and chain muxes

Bit 8: ib_isolate 0 control bypass of input wrapper flops

Bit 9: ob_isolate 0 control bypass of output wrapper flops
Bit 10: propagate_si 0 Controls masking of
Bit 11: propagate_so 0 scan_in/out
Bit 12: test_mode_tdr_override_en 0

Bit 13: test_mode_tdr_override_val 0

1 Controls hijacking of global
Bit 14: propagate_test_mode_set_and_reset 0 See 0 tap_test_mode_tdr signal
Desc. in
Bit 15: ctcm_clkctrl_coretest_en 0 document

tap_test_mode_tdr
CBDFT Architecture Overview

• Aggressive shared DFT isolation

IB chains OB chains

Functional Functional
PIs POs

Comb. Comb.
Logic Logic

Helper flops
(to be put on
OB chains)
Training Outline:

• CBDFT Architecture Overview

• CBDFT Top-level Flow Setup 
• CBDFT Chip-level Implementation and FV
• CBDFT Chip-level Static ATPG
• CBDFT Chip-level Transition-Test/Path-Delay ATPG
CBDFT Top-level Flow Setup

• Flow has a setup script that populates all utilities, scripts &
datafiles to prepare for DFT impl, FV and ATPG
automation. Follow the steps below:
1. cd into your working directory
2. mkdir cbdft
3. cd cbdft
4. /prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/gen_topcbdft_impl.t
cl . -compress_tech MENTOR |& tee gen_topcbdft_impl.log
5. Examine gen_topcbdft_impl.log for Error messages and further
instruction

• Running the gen_topcbdft_impl.tcl script without argument

shows its usage.
– You can control the exact list of files to populate
– Usually following the steps above is good enough
CBDFT Top-level Flow Setup

• Output of running gen_topcbdft_impl.tcl:

 cbdft_config.tcl  main data input file. To be filled by user
 link.tcl  tcl script to set up DC (link, *_library). To be modified by user
 setup.cmd  tcsh script to setup lsf for running Dc_shell and other
tools. To be modified by user
 dc_custom_procedures.tcl  contains definitions of custom procedure
calls sprinkled all over the standard dc-tcl files for expert users to make
augmentations to the flow. Also contains some canned procedures to be
called for improving coverage (ex: observe-point insertion. more info
embedded in the file)
 (unless otherwise specified, the above files will not be overwritten by
rerunning gen_topcbdft_impl.tcl)

 Runme.impl  main script to run CBDFT implementation and FV

 checklist_instruction.txt  contains a series of unix commands that

can be copy&pasted onto the prompt to check CBDFT QOR after
running through the flow. This is similar to the core-level CBDFT flow
CBDFT Top-level Flow Setup

• Output of running gen_topcbdft_impl.tcl (cont):

 dftc.tcl (files below do not need to be modified)

 merge.tcl
 alpha.stitch.tcl
 alpha.uncomp_chain.eco.flat.tcl
 check_or_fix_cgc_test_en.tcl
 Integrate_edt.tcl
 clamp_dft_outputs.tcl
 dft_drci.tcl
 merge_scan_def.tcl
 remove_hm_sout_lockups_from_design_and_scan_def.tcl
 top_cbdft.tcl
 gen_fv_setup.tcl
 sanitycheck_fv_scanpin_constraints.tcl
Training Outline:

• CBDFT Architecture Overview

• CBDFT Top-level Flow Setup
• CBDFT Chip-level Implementation and FV
• CBDFT Chip-level Static ATPG
• CBDFT Chip-level Transition-Test/Path-Delay ATPG
CBDFT Chip-level Implementation

• Prerequisite 1: carve out soft CBDFT cores and run core-

level CBDFT flow on them
 Chip top is usually too big as a single CBDFT partition

 Large hierarchies are carved out of chip-top and treated as

standalone CBDFT cores
 These softcores are to run through core-level CBDFT flow

 Post CBDFT softcores are merged back into chip_top during top-
level CBDFT impl (desicribe in the next few slides)

 Typical CBDFT softcores are:

 mmss
 periph_noc
 system_noc
 config_noc
CBDFT Chip-level Implementation
• Prerequisite 2: gen_topcbdft_impl.tcl has been run
======
• Now, follow instruction from running gen_topcbdft_impl.tcl.
Instruction should be at the end of gen_topcbdft_impl.log
(from flow setup step)
1. Copy atpg_ports.tcl, padring_stump.tcl from chip_build output to
cbdft dir
2. modify link.tcl to allow for proper design link and correct
define_design_lib commands
3. modify cbdft_config.tcl according to design  main step
 Tcl-based file
 contains all design-related input
 Read comments in file for detailed instructions
4. examine setup.cmd to ensure proper tool version and lsf settings,
modify if necessary
5. invoke, ./Runme.impl
CBDFT Chip-level Implementation
• cbdft_config.tcl contains all design-related info. Used by all
downstream steps (impl, static ATPG, transition ATPG)

• Content of cbdft_config.tcl broken into sections

 SUPPORT FILES SECTION  atpg_ports.tcl, padring_stumps.tcl…
 INCOMING DATA SECTION  incoming netlist…
 DEFAULT NAMING SECTION  std cell names…
 CBDFT SECTION  CBDFT partition declarations…
 STITCHING SECTION  DFTC settings…
 POST-STITCHING SECTION  clamp insertion, sanity checks…
 FV SECTION  FV constraint gen/checks, fecad FV settings…
 GENERAL ATPG SECTION  atpg, spf settings…
 TRANSITION-TEST/PATH-DELAY SECTION  freq, pll settings…
CBDFT Chip-level Implementation

• fill out cbdft_config.tcl at minimum everything up to and

including “FV SECTION”
• Here’s an example of cbdft_config.tcl, double-click to view
CBDFT Chip-level Implementation

• Runme.impl invokes Dc_shell, tessent shell and Conformal

in sequential order. Below is the file content
# cbdft connection and raw-chain stitching
Dc_shell -f dftc.tcl |& tee dftc.log
 Same way as snps-based CBDFT flow of carving soft-CBDFT-cores
 CBDFT connection same as snps flow with 3 additional wiring (edt_update, 2 pipe-clocks)
 Instead of stitching lpc+lpu chains, stich raw stumps for lpc
 Integrated with existing chip_build output (padring_stump.tcl, atpg_ports.tcl)

# generate Mentor edt IP RTL

bsub -q dft -Ip tessent -shell \
-dof ./edt_skeleton/edt_create_ip.dofile.tcl \
-log edt_create_ip.log -replace
 new

# integrate Mentor edt IP

Dc_shell -f integrate_edt.tcl |& tee integrate_edt.log
 new

… cont.
Mentor-edt top-level CBDFT impl flow

• cont …

• # merging soft CBDFT cores and post-process

• Dc_shell -f merge.tcl |& tee merge.log
•  Almost identical to snps merge.tcl run

• # -------------
• # post CBDFT FV
• # -------------
• Dc_shell -f gen_fv_setup.tcl | & tee gen_fv_setup.log
• ./Invoke.fv
• Dc_shell -f sanitycheck_fv_scanpin_constraints.tcl | & tee sanitycheck_fv_scanpin_constraints.log
•  Identical to FV flow using snps-based CBDFT implementation
CBDFT Chip-level Implementation
• dftc.tcl purpose:
 Read design and remove soft CBDFT cores
 Perform CBDFT connections (SI, SO, pipeline, CTCM link-up)
 Hook up uncomp chain between tdi and tdo
 Connect cgc:test_en
 Perform scan stitch of raw stumps in chip-top CBDFT partition

• dftc.tcl output:
 cgc_hookup.rpt
 top.test_assume.rpt
 top.dft_signal.rpt
 top.pre_stitch_drc.rpt  use this to judge DFT DRC violations
 top.preview_stitching.rpt  use this to examine chain make-up
 (cont.)
CBDFT Chip-level Implementation
• dftc.tcl output (cont.’ed):
 top.raw_stumps.spf
 adjust_design.log  log for reading design and carve soft cores
 cbdft.log  log for CBDFT connections
 dftc.log  main log for dftc.tcl run
 top.adjusted.v  initial preDFT netlist with soft cores carved out
 top.cbdft.v  netlist with CBDFT logic added, pre-scan-stitch
 top.ready_for_edt.v  netlist with raw stumps, for edt insertion
 top_only.scan.def  scandef corresponding to top partition only
 edt_create_ip.dofile.tcl  for next step
CBDFT Chip-level Implementation
• edt_create_ip.dofile.tcl purpose:
 Create skeleton design to generate EDT logic

• edt_create_ip.dofile.tcl output:
 edt_create_ip.log
 edt_skeleton/edt_created_edt.v  EDT rtl
 Other files in edt_skeleton
CBDFT Chip-level Implementation
• integrate_edt.tcl purpose:
 Synthesize edt rtl
 Insert edt block into chip top
 Include hardware to support combo-lpc mode

• integrate_edt.tcl output:
 integrate_edt.log  contains ‘NODFT’ violation msgs, if any
 top.blasted.v  bitblasted post-scan-stitch netlist
 top.bussed.v  bussed post-scan-stitch netlist
CBDFT Chip-level Implementation
• merge.tcl purpose:
 Combine post-scan-stitch top with post-CBDFT soft cores
 Combine scandefs of softcores with top_only.scan.def
 Remove unwanted LULs on SO of large HMs (design & scandef)
 Insert mode-ctrl pin clamping to enable LPC IDDQ
 Insert IB/OB bypass flops to enhance LPC IDDQ
 Insert power clamps on DFT and LV output ports of GDFS HMs
 Check known HV/AO pins to ensure no DFT logic on them

• merge.tcl output:
 merge.log  contains ‘NODFT’ violation msgs, if any
 top.merged.blasted.v  final post CBDFT netlist (bussed)
 top.merged.fully.blasted.v  final post CBDFT netlist (bitblasted)
 combined.nolul.def  final scandef
CBDFT Chip-level Implementation
• gen_fv_setup.tcl purpose:
 Create DFT FV constraint file on scan-in and shift of blackboxes
 Scan_ins become ignore points
 Shift pins become constant 0
 Blackboxes are defined by fecad FV flow through liblist
parsing
 Create fecad FV setup
 Create FV invocation script

• gen_fv_setup.tcl output:
 blackbox_fv  Standard fecad FV dir
 blackbox_fv/dft_fv_cons.blackbox_fv.tcl  DFT FV constraints
 ./Invoke.fv  FV invocation script
CBDFT Chip-level Implementation
• Invoke.fv purpose:
 Runs pre-DFT vs. post-DFT FV using fecad flow

• Invoke.fv output:
 In dir: blackbox_fv/fv/pre_dft_post_dft/fv_<top>
 FV_PASS/FV_FAIL  pass/fail FV results
 hm_list.tcl  list of FV blackboxes. These will have scan-in
and shift constraints
 lec.run.log  log
 All files are standard to fecad flow. Ping fecad.help for FV
tool related issues
CBDFT Chip-level Implementation
• sanitycheck_fv_scanpin_constraints.tcl purpose:
 Another sanity-checks to ensure the scan-in/shift constraints are
applied on actual scan-in/shifts
 Scan-in: examine fanin-cone to confirm DFT related logic
 Shift: use TEST-394 message to confirm shift pin:
 Warning: Disconnecting pin 'u_chip_core_top/u_rpm_wrapper/u_rpm/tap_atpg_shift'
to route scan enable. (TEST-394)

• sanitycheck_fv_scanpin_constraints.tcl output:
 sanitycheck_fv_scanpin_constraints.log  log file. Search for
“CHECK THIS” in the log. It lists out pins that script can’t confirm
to be scan-in/shift
CBDFT Chip-level Implementation
• intepreting results:
 Examine checklist_instructions.txt file for key QOR checks

 Some noteable checks in the above file

 Grep for Error in all logs and reports, there should be none
 Examine top.pre_stitch_drc.rpt
 No unwanted black boxes (indication of missing CTLs)
 No unexplained D1, D2, D3, D9 violations
 Examine top.preview_stitching.rpt
 Look for warnings indicating chains with 0 length.
Shouldn’t have any
 Examine chain balancing

 Example checklist_instruction.txt, double click:

Training Outline:

• CBDFT Architecture Overview

• CBDFT Top-level Flow Setup
• CBDFT Chip-level Implementation and FV
• CBDFT Chip-level Static ATPG, with modular read_design
• CBDFT Chip-level Transition-Test/Path-Delay ATPG
CBDFT Chip-level Static ATPG
• Modular read_design:
• this is an integrated feature that loads full netlists for targeted
CBDFT partition, and (almost) empty shell netlists for non-targted
CBDFT partition.

• Steps to setup static ATPG:

1. fill cbdft_config.tcl file up to and including “GENERAL ATPG
SECTION”, two notable sections on building designs
• cbdft_config(atpg_library): contains list of library elements
that will go through Mentor libcomp. Recommend to put
include RAMs, ROMs, and I/O PAD verilogs
• cbdft_config(atpg_design): two columns, pertinent CBDFT
partition, verilog netlist path name. Downstream flow will use
partition name to load full netlist or auto-gen’ed
corresponding shell netlist depending on if target partition
matches partition associated with the netlist. When not sure
which partition the netlist belongs to, specify “top” as the
partition so that it’s always loaded
CBDFT Chip-level Static ATPG
• Steps to setup static ATPG (cont.):
2. (pwd = location of cbdft_config.tcl)
/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_build_desig
n_tk.tcl ./cbdft_config.tcl tk_static [-auto] | & tee setup_build.log
• create library compilation script and read_design file based on
atpg_library and atpg_design entries. Honors partition spec in
atpg_design.
• tk_static/build/libcomp.dof  compiles all atpg_library elems
• tk_statick/build/shell_netlist/create_shell.tcl  generates shell
netlists for CBDFT cores
• tk_static/build/read_verilog_fix.do  main script to read all
necessary netlists for atpg. Will selectively choose between full
netlist and shell netlist based on targeted CBDFT partition
• Above script has an –auto option. If atpg_design entry has top as
partition, -auto will direct script to parse the netlist to see if it
belongs to a particular partition. This adds run time, but may
ultimately reduce memory footprint of the ATPG runs
CBDFT Chip-level Static ATPG
• Steps to setup static ATPG (cont.):

3. Run limbcomp to translate all atpg_library elements

cd tk_static/build
./Run.libcomp

4. Generate shell netlists

(optional, only needed if doing modular-base atpg)
cd tk_static/build/shell_netlist
./create_shell.tcl

5. (pwd = location of cbdft_config.tcl)

/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_staticte
st_tk.tcl ./cbdft_config.tcl tk_static | & tee gen.statictk.log
• Generates all directories, testproc, tk scripts and Runme files
CBDFT Chip-level Static ATPG
• Steps to setup static ATPG (cont.):

6. Update static_tk/testproc_fragments directory with chunks of

testproc file to complete test_setup sequence of all CBDFT partitions

7. Rerun step 3 to update all testproc files with new inclusions in the
static_tk/testproc_fragments directory

• ATPG can be attempted any point after step 3

• Steps 5 to 6 can be repeated to make incremental updates to
testproc files. (testproc_fragments will be described in detail
later)
• Any update to cbdft_config(atpg_library) will trigger step 3
• Any update to cbdft_config(atpg_design) will trigger stpe 4 and 5
• User is discouraged from directly modifying files in builds dir.
Instead please modify cbdft_config.tcl accordingly
CBDFT Chip-level Static ATPG
• cbdft_config content: “GENERAL ATPG SECTION”
 Defines tool settings and version
 Waveform table
 Hooks for reading in design (atpg_library, atpg_design)
 Dead cycle count for scan capture (to allow shift-enable to settle)
 (read comments in the cbdft_config.tcl file)

• setup_statictest_tk.tcl usage info:

USAGE: /prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_statictest_tk.tcl \
cbdft_config.tcl \
tk_static.<name> \
<-overwrite_custom_procs> \ <== optional
<-dont_modify_files patt1 patt2 ...> \ <== optional
<-only_modify_files patt1 patt2 ...> <== optional

 The optional arguments further restricts the scripts on what files to generate.
“patt1/2…” are glob patterns that match filenames. Note that single quotes ‘’
surround patt is required. Ex: ‘*testproc’
CBDFT Chip-level Static ATPG

• output dir structure: after running below command

/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_statictes
t_tk.tcl ./cbdft_config.tcl tk_static | & tee gen.statictk.log

• Creates output dir called tk_static

• Directories inside static_tk are:

• Directory for each CBDFT partition (a2_core, mdp4,
lpass_core, mmss …), directory name is “nickname”
of the core
• A directory called testproc_fragments
CBDFT Chip-level Static ATPG

• Directory under each nickname dir:

• edtlpc.debug  debug dir to trace chains in edtlpc mode
• combolpc.debug  debug dir to trace chains in combolpc mode
• lpu.debug  debug dir to trace chains in lpu mode
• final_atpg  ATPG run dir with all topup to create final patterns
• coverage_analysis  similar to final_atpg, but use lpu as main run
to save license usage
• *.debug dirs each contains the following files (pipe/nopipe
means engage/bypass pipelines)
• nopipe.DONT_MODIFY.testproc
• pipe.DONT_MODIFY.testproc
• atpg.DONT_MODIFY.tcl  tk tcl dofile to loop thru all testprocs
• Runme.tk  Run this to invoke tk
CBDFT Chip-level Static ATPG

• final_atpg and coverage_analysis dirs each contains:

• atpg.DONT_MODIFY.tcl  tk dofile script
• Generates full patterns
• Reports overall coverage
• Contains a sequence of ATPG top-ups to maximize coverage
Makes use of testproc files from ../*.debug dirs
• Runme.tk  Run this to invoke tk

• When to run what?

• First, run Runme.tk of *.debug dirs to ensure proper chain trace
• Then run Runme.tk of coverage_analysis dir to debug coverage
issue. This setup uses lpu mode and saves license usage
• Then run Runme.tk of final_atpg dir to produce final patterns
CBDFT Chip-level Static ATPG
• Motivation for testproc_fragments
• Too many testproc/spf files! Ex. Waverider has ~30 cores, each core has
3 modes (lpc, lpu, ctt), each mode has 4 testproc/spf files  360 files!
• All files are slightly different
• Test_setup difference
• (possibly) Timing tweaks
• Cannot manually tweak all 360 files, need to automation to handle tweaks
to each file, hence concept of testproc_fragments

• testproc_fragments directory content

• Contains a list of files that hold snippets of testproc code/sequence
• Each file name follows specific naming convention
• setup_static_tk.tcl will create test_setup section of all testprocs by piecing
together the right selection of testproc_fragments files based on naming
convention
• A number of standard fragments already exist and will be populated by
setup_static_tk.tcl
• other sections of testproc can also be created, but mostly not needed
CBDFT Chip-level Static ATPG

testproc_fragments naming convention

test_setup.###.<allpartitions|core_nickname>.<allmodes|edtlpc|combolpc|lpu|>.<
autogen|manual>.<description>

• ###: 3 digit number, used to determine order of fragments

• <allpartitions|core_nickname>: specifies if fragment is for a
specific CBDFT partition or common to all partitions
• <allmodes|lpc|lpu|ctt>: specifies mode(s) of testproc
• <autogen|manual>: specify manual for user-defined fragments
• <description>: any string to describe purpose of the fragment. No
“.” is allowed in this string.
CBDFT Chip-level Static ATPG

Existing testproc_fragments:

test_setup.100.allpartitions.allmodes.autogen.tap_test_mode_tdr_chn_initial_uncompress_programming_testpro
cseq
test_setup.100.allpartitions.lpc.autogen.tap_test_mode_tdr_chn_initial_programming_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_coretestlpc_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_coretestlpu_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_ctt_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_othercore_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_toptest_testprocseq
test_setup.900.allpartitions.allmodes.autogen.tap_test_mode_tdr_chn_final_uncompress_programming_testproc
seq
test_setup.900.allpartitions.lpc.autogen.tap_test_mode_tdr_chn_final_programming_testprocseq
CBDFT Chip-level Static ATPG
Sample testproc_fragments after some are manually created:
signal_group.100.q6_2.allmodes.manual.copied_from_waveriderV1_officialsetup
test_setup.030.allpartitions.allmodes.manual.startup_sequence
test_setup.050.allpartitions.allmodes.manual.lpddr2pad_programming_to_avoid_contention
test_setup.060.q6_1.lpc.manual.cji_intest_programming
test_setup.060.q6_1.lpu.manual.cji_intest_programming
test_setup.060.q6_2.lpc.manual.cji_intest_programming
test_setup.060.q6_2.lpu.manual.cji_intest_programming
test_setup.060.q6_3.lpc.manual.cji_intest_programming
test_setup.060.q6_3.lpu.manual.cji_intest_programming
test_setup.060.top.allmodes.manual.cji_extest_programming
test_setup.100.allpartitions.allmodes.autogen.tap_test_mode_tdr_chn_initial_uncompress_programming_testpro
cseq
test_setup.100.allpartitions.lpc.autogen.tap_test_mode_tdr_chn_initial_programming_testprocseq
test_setup.200.allpartitions.allmodes.manual.spare2_programming_to_setup_3rd_tcb_clkmux
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_coretestlpc_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_coretestlpu_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_ctt_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_othercore_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_othercore_togglereset_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_toptest_testprocseq
(cont.)
CBDFT Chip-level Static ATPG
Sample testproc_fragments after some are manually created:
(cont…)
test_setup.550.allpartitions.allmodes.manual.ring_osc_programming
test_setup.600.allpartitions.allmodes.manual.pll_programming
test_setup.900.allpartitions.allmodes.autogen.tap_test_mode_tdr_chn_final_uncompress_programming_test
procseq
test_setup.900.allpartitions.lpc.autogen.tap_test_mode_tdr_chn_final_programming_testprocseq
waveform_table.100.q6_2.allmodes.manual.copied_from_waveriderV1_officialsetup

Example location:
/prj/qct/dft/sandiego/flows/cbdft/testcases/top/elessar_edt_trial.beta_release/h18
- testproc_fragments
- build
Feel free to look at contents of the fragments. You’ll notice they are simply chunks of testproc
files. Build dir contains the dofiles and scripts mentioned in the previous slides
CBDFT Chip-level Static ATPG

When several fragments contain the same ###, only one

fragment is chosen for a given testproc file. following rule
governs what is chosen
• Smaller number below indicates higher priority
• $nickname means any specific CBDFT partition nickname
• $intended_mode means edtlpc, combolpc, or lpu
# 1 manual $nickname $intended_mode
# 2 manual $nickname allmodes
# 3 manual allpartitions $intended_mode
# 4 manual allpartitions allmodes
# 5 autogen $nickname $intended_mode
# 6 autogen $nickname allmodes
# 7 autogen allpartitions $intended_mode
# 8 autogen allpartitions allmodes
-“manual” has priority over “autogen”
-Specific parition/mode has priority over common allpartition/allmodes
Training Outline:

• CBDFT Architecture Overview

• CBDFT Top-level Flow Setup
• CBDFT Chip-level Implementation and FV
• CBDFT Chip-level Static ATPG
• CBDFT Chip-level Transition-Test/Path-Delay ATPG 
CBDFT Chip-level TDF/PDF ATPG
• Steps to setup transition-test ATPG:

1. fill cbdft_config.tcl file up to and including “TRANSITION-TEST

AND PATH-DELAY ATPG SECTION”

2. Copy from to link to the static ATPG dir’s build sub-directory

3. (pwd = location of cbdft_config.tcl)

/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_transiti
ontest_tk.tcl ./cbdft_config.tcl tk_transition | & tee gen.transitiontk.log
• Generates all directories, testproc, tk scripts and Runme files
CBDFT Chip-level TDF/PDF ATPG
• Steps to setup transition-test ATPG:

3. Update tk_transition/testproc_fragments directory with chunks of

testproc file to complete test_setup sequence of all CBDFT
partitions
4. Rerun step 2 to update all testproc files with new inclusions in the
static_tk/testproc_fragments directory

• ATPG can be attempted any point after step 2

• Step 3 and 4 can be repeated to make incremental updates to
testproc files. (testproc_fragments will be described in detail
later)
CBDFT Chip-level TDF/PDF ATPG
• (THIS ISN’T YET AVAILABLE)Steps to setup path-delay
ATPG:
1. Reuse the cbdft_config.tcl
2. (pwd = location of cbdft_config.tcl)
/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_pat
hdelay_tk.tcl ./cbdft_config.tcl pathdelay_tk | & tee
gen.pathdelaytk.log
• Generates all directories, testproc, tk scripts and Runme files

3. Update pathdelay_tk/testproc_fragments directory with chunks of

testproc file to complete test_setup sequence of all CBDFT
partitions
4. Rerun step 2 to update all testproc files with new inclusions in the
static_tk/testproc_fragments directory

• ATPG can be attempted any point after step 2

• Step 3 and 4 can be repeated to make incremental updates to
testproc files. (testproc_fragments will be described in detail
later)
CBDFT Chip-level TDF/PDF ATPG
• cbdft_config content:
“TRANSITION-TEST AND PATH-DELAY ATPG SECTION”

 Defines PLL settings (LMN range, vco, refclk MHz…)

 tcr and tcg flop/instance names
 Frequency settings (f#, MHz, freq_en pins, LMN…)
 Frequencies pertaining to each CBDFT partition
 TDF and PDF PT timing run directories. Contains files to be
loaded into tk for ATPG. Format below:
 TDF: .../<core_nickname>/f#/worst/run/pt_falsepath.tcl
 PDF: .../<core_nickname>/f#/<corner>/run/pdf_##_##.rpt
CBDFT Chip-level TDF/PDF ATPG
• setup_transitiontest_tk.tcl usage info:
/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_transitiontest_tk.tcl \
cbdft_config.tcl \
tk_transition.<name> \ <== output dir location
<-overwrite_custom_procs> \ <== optional
<-dont_modify_files ‘patt1’ ‘patt2’ ...> \ <== optional
<-only_modify_files ‘patt1’ ‘patt2’ ...> <== optional

• setup_pathdelay_tk.tcl usage info (NOT YET AVAILABLE):

/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_pathdelay_tk.tcl \
cbdft_config.tcl \
tk_pathdelay.<name> \ <== output dir location
<-overwrite_custom_procs> \ <== optional
<-dont_modify_files ‘patt1’ ‘patt2’ ...> \ <== optional
<-only_modify_files ‘patt1’ ‘patt2’ ...> <== optional

 The optional arguments further restricts the scripts on what files to generate.
“patt1/2…” are glob patterns that match filenames. Note that single quotes ‘’
surround patt is required. Ex: ‘*testproc’
CBDFT Chip-level TDF/PDF ATPG

• output dir structure: after running below command

/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_transitio
ntest_tk.tcl ./cbdft_config.tcl tk_transition | & tee gen.transitiontk.log

• Creates output dir called tk_transition

• Directories inside tk_transition are:

• Directory for each CBDFT partition (a2_core, mdp4,
lpass_core, mmss …), directory name is “nickname”
of the core
• A directory called testproc_fragments
CBDFT Chip-level TDF/PDF ATPG

• output dir structure: after running below command

/prj/qct/dft/sandiego/release/cbdft_top/edt_v1.0.1/src/tk/setup_pathdela
y_tk.tcl ./cbdft_config.tcl pathdelay_tk | & tee gen.pathdelaytk.log

• Creates output dir called pathdelay_tk

• Directories inside pathdelay_tk are:

• Directory for each CBDFT partition (a2_core, mdp4,
lpass_core, mmss …), directory name is “nickname”
of the core
• A directory called testproc_fragments
CBDFT Chip-level TDF/PDF ATPG

• Directory under each nickname dir:

• A list of directories for all frequencies associated with the CBDFT
parition
• Each frequency will have an EDT-LPC and LPU directory
• Dir name:
<edtlpc|lpu>.pll<0|1>.trans.<freqname>.<speed>.<LMN>.<divBy>

• For example:
/prj/qct/dft/sandiego/flows/cbdft/testcases/top/elessar_edt_trial.beta_release/tdf6/a4x_cx_elessar
edtlpc.pll0.trans.f34.565MHz.L56_M1_N2.div2/
edtlpc.pll0.trans.f37.320MHz.L64_M0_N1.div4/
edtlpc.pll0.trans.f90.565MHz.L56_M1_N2.div2/
lpu.pll0.trans.f34.565MHz.L56_M1_N2.div2/
lpu.pll0.trans.f37.320MHz.L64_M0_N1.div4/
lpu.pll0.trans.f90.565MHz.L56_M1_N2.div2/
CBDFT Chip-level TDF/PDF ATPG

• Each freq dir for each CBDFT partition contains:

• nopipe.DONT_MODIFY.testproc  trans testproc, pipeline bypassed
• pipe.DONT_MODIFY.testproc  trans testproc, pipeline engaged

• atpg.DONT_MODIFY.tcl  tk tcl script, uses pipe testproc

• Targets frequency pertaining to the dir
• Runme.tk  Run this to invoke tk

• tcg_clk_observe.DONT_MODIFY.tcl  tk tcl script that generates pattern to

observe tcg clock pulses of target frequency on tdo, uses se0.pipe testproc
• Runme.tk.tcg_clk_observe  Run this to invoke tk

• When to run what?

• TDF: Run all Runme.tk* of all edtlpc* dirs
• PDF: Run all Runme.tk* of all edtlpc* dirs
CBDFT Chip-level TDF/PDF ATPG
• Motivation for testproc_fragments
• Too many testproc/spf files! Ex. Waverider has ~30 cores, each
core has up to ~10 frequencies, and 2 modes (lpc, lpu), each mode
has 2 testproc files  ~600 testprocs!
• All files are slightly different
• Test_setup difference, PLL programming
• (possibly) Timing tweaks
• Cannot manually tweak all 600 files, need to automation to handle
tweaks to each file, hence concept of testproc_fragments
• testproc_fragments directory content
• Contains a list of files that hold snippets of testproc code/sequence
• Each file name follows specific naming convention
• setup_transition_tk.tcl will create test_setup section of all testprocs
by piecing together the right selection of testproc_fragments files
based on naming convention
• A number of standard fragments already exist and will be populated
by setup_static_tk.tcl
• non-sections of testproc can also be created, but mostly not needed
CBDFT Chip-level TDF/PDF ATPG

testproc_fragments naming convention

test_setup.###.<allpartitions|core_nickname>.<allmodes|lpc|lpu|ctt>.<autogen|ma
nual>.<description>

• ###: 3 digit number, used to determine order of

testproc_fragments
• <allpartitions|core_nickname>: specifies if fragment is for a
specific CBDFT partition or common to all partitions
• <allmodes|lpc|lpu|ctt>: specifies mode(s) of testproc
• <autogen|manual>: specify manual for user-defined fragments
• <description>: any string to describe purpose of the fragment. No
“.” is allowed in this string.
CBDFT Chip-level TDF/PDF ATPG

Existing transition-test testproc_fragments:

test_setup.100.allpartitions.allmodes.autogen.tap_test_mode_tdr_chn_initial_uncompress_programming_testpro
cseq
test_setup.100.allpartitions.lpc.autogen.tap_test_mode_tdr_chn_initial_programming_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_coretestlpc_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_coretestlpu_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_ctt_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_othercore_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_othercore_togglereset_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_toptest_testprocseq
test_setup.700.allpartitions.allmodes.autogen.pll_frequency_setup_testprocseq
test_setup.800.allpartitions.allmodes.autogen.tcr_ctrl_chn_programming_testprocseq
test_setup.900.allpartitions.allmodes.autogen.tap_test_mode_tdr_chn_final_uncompress_programming_testproc
seq
test_setup.900.allpartitions.lpc.autogen.tap_test_mode_tdr_chn_final_programming_testprocseq
CBDFT Chip-level TDF/PDF ATPG
Sample testproc_fragments after some are manually created:
test_setup.030.allpartitions.allmodes.manual.startup_sequence
test_setup.040.allpartitions.allmodes.manual.tap_test_mode_tdr_chn_first_programming_testprocseq_for_sdf
test_setup.050.allpartitions.allmodes.manual.lpddr2pad_programming_to_avoid_contention
test_setup.060.q6_1.lpc.manual.cji_intest_programming
test_setup.060.q6_1.lpu.manual.cji_intest_programming
test_setup.060.q6_2.lpc.manual.cji_intest_programming
test_setup.060.q6_2.lpu.manual.cji_intest_programming
test_setup.060.q6_3.lpc.manual.cji_intest_programming
test_setup.060.q6_3.lpu.manual.cji_intest_programming
test_setup.060.top.allmodes.manual.cji_extest_programming
test_setup.100.allpartitions.allmodes.autogen.tap_test_mode_tdr_chn_initial_uncompress_programming_testpro
cseq
test_setup.100.allpartitions.lpc.autogen.tap_test_mode_tdr_chn_initial_programming_testprocseq
test_setup.200.allpartitions.allmodes.manual.spare2_programming_to_setup_3rd_tcb_clkmux
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_coretestlpc_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_coretestlpu_testprocseq
(cont.)
CBDFT Chip-level TDF/PDF ATPG
Sample testproc_fragments after some are manually created:
(cont…)
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_ctt_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_othercore_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_othercore_togglereset_testprocseq
test_setup.500.allpartitions.allmodes.autogen.DONT_TOUCH_toptest_testprocseq
test_setup.550.allpartitions.allmodes.manual.ring_osc_programming
test_setup.700.allpartitions.allmodes.autogen.pll_frequency_setup_testprocseq
test_setup.800.allpartitions.allmodes.autogen.tcr_ctrl_chn_programming_testprocseq
test_setup.900.allpartitions.allmodes.autogen.tap_test_mode_tdr_chn_final_uncompress_programming_testproc
seq
test_setup.900.allpartitions.lpc.autogen.tap_test_mode_tdr_chn_final_programming_testprocseq

Example location:
/prj/qct/dft/sandiego/flows/cbdft/testcases/top/elessar_edt_trial.beta_release/tdf6

Feel free to look at contents of the fragments. You’ll notice they are simply chunks of testproc files
CBDFT Chip-level TDF/PDF ATPG

When several fragments contain the same ###, only one

fragment is chosen for a given testproc file. following rule
governs what is chosen
• Smaller number below indicates higher priority
• $nickname means any specific CBDFT partition nickname
• $intended_mode means lpc, lpu or ctt
# 1 manual $nickname $intended_mode
# 2 manual $nickname allmodes
# 3 manual allpartitions $intended_mode
# 4 manual allpartitions allmodes
# 5 autogen $nickname $intended_mode
# 6 autogen $nickname allmodes
# 7 autogen allpartitions $intended_mode
# 8 autogen allpartitions allmodes
-Manual has priority over autogen
-Specific parition/mode has priority over common allpartition/allmodes
CBDFT Chip-level TDF/PDF ATPG

test_setup.700.allpartitions.allmodes.autogen.pll_frequency_setup_testpro
cseq

- This file contains example of PLL programming

- Normal testproc fragments are simply copied&pasted into testproc, not this
one
- search for “proc:declare_core_info” in the file
- they define how L/M/N values of the PLL, can be programmed dynamically
- PLL settings are either provided directly in cbdft_config.tcl or calculated by
script
- L/M/N values are inserted into fields in the file named L_idx#, M_idx#,
N_idx# by setup_tk_transition.tcl

- The PLL programming sequence is different for every chip. So create your
own PLL programming testproc fragment based on the above convention
- Call you file the name below, so to overwrite the example file:
test_setup.700.allpartitions.allmodes.manual.pll_frequency_setup_testpro
cseq
Closing…

• To see a live testcase:

• /prj/qct/dft/sandiego/flows/cbdft/testcases/top/elessar_edt_trial.bet
a_release
• Location contains
• CBDFT impl (./)
• Static ATPG (./h18)
• Transition-test ATPG (./tdf6)

• For any question, contact cbdft.help

Thank you