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Working of JFET

(V GS = 0V & V DS > O V)
Working of JFET

 Working principles of JFET:


i. V GS = 0 V V DS >
ii. V GS < 0 V 0V
i. V GS = 0 V

 Thegate regions in a JFET


are embedded on each
side of the channel to help
control the amount of
current flow.
i. V GS = 0 V

 Ann -channel JFET with


both gates shorted to the
source.
 Thedrain supply voltage, V
DD , reverse-biases both p-
n junctions. This results in
zero gate current.
i. V GS = 0 V

 Ifboth gates are centered


vertically in the channel
(which is the case for a
symmetrical JFET), the voltage
distribution over the length of
the channel makes the width
of the depletion layer wider
near the top of the channel
and narrower at the bottom.
i. V GS = 0 V

 Current flows in the channel


between the depletion layers and
not in the depletion layers
themselves.
 Thedepletion layers penetrate
deeply into the n -channel and
only slightly into the p -type gate
regions due to the different
doping levels in the p and n
materials.
V DD = 15 V

i. V GS = 0 V 3.75
V
11.25
V
Voltage drop across each
resistors;

V DD = + 15 V
No. resistor = 4 ( same
value)

Voltage drop = V DD / no. R

Voltage drop = 15 V / 4

Voltage drop = 11. 25 V


V SS = 0
V
ii. V GS < 0 V

 Normalbiased of N -
channel JFET.
 Notonly is the drain made
positive relative to the
source, but the gate is
made negative relative to
the source.
ii. V GS < 0 V

 Theeffect of the negative


gate voltage is to expand
the width of the depletion
regions, which in turn
narrows the channel.
 Thechannel becomes
narrower, the drain
current, I D , is reduced.
ii. V GS < 0 V

 Byvarying the gate-source


voltage, designated V GS,
the drain current, I D, can
be controlled.
ii. V GS < 0 V

 IfV GS is made negative


enough, the depletion
layers touch, which
pinches off the channel.
The result is zero drain
current.
ii. V GS < 0 V

 Theamount of gate-source
voltage required to reduce
the drain current, I D, to
zero is called the gate-
source cutoff voltage,
designated V GS(off) .
ii. V GS < 0 V

 Thepolarity of the biasing


voltages for a p-channel
JFET is opposite from that
of an n-channel JFET.
 Fora p-channel JFET, the
drain voltage is negative
and the gate voltage is
positive.

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