DC BIASING

Bipolar Junction Transistor (BJT)

 Summary

Fixed Bias Configuration

Emitter Bias Configuration

Voltage Divider Bias

In the previous bias configuration:

ICQ = Collector Current

VCEQ = Voltage drop between Emitter and Collector Terminal

These two parameters were a function of transistor β (beta)

• β is is temperature sensitive, especially for silicon transistors, and the actual value
of beta is usually not well defined

• It would be desirable to develop a bias circuit that is less dependent on, or in fact
is independent of, the transistor beta.

Voltage Divider Bias

Circuit Diagram of a Voltage Divider Bias

• The Figure shows the voltage-divider bias

configuration network
 the sensitivity to changes in beta is quite small
 If the circuit parameters are properly chosen,
the resulting levels of ICQ and VCEQ can be almost
totally independent of beta
 There are two methods that can be applied to
analyze the voltage-divider configuration:
1. The first to be demonstrated is the exact
method: which can be applied to any voltage-
divider configuration
2. The second is referred to as the approximate
method :and can be applied only if specific
conditions are satisfied
Exact Analysis

For the dc analysis the network of Figure A can be redrawn as shown in Figure B
The input side of the network
can then be redrawn as shown in
Figure
The voltage source is replaced by a short-circuit equivalent as shown in Figure B
The voltage source V CC is returned to the
network and the open-circuit Thévenin
voltage of Figure determined as follows:

Applying the voltage-divider rule gives

The Thévenin network is then
redrawn as shown in Fig. 4.34 ,
and IBQ can be determined by
first applying Kirchhoff’s voltage
law in the clockwise direction for
the loop indicated:

KVL
Once I B is known, the remaining quantities of the network can be found in the same
manner as developed for the emitter-bias configuration. That is,

Exact Analysis Equation

Example 1

 Determine the dc bias voltage

 VCE
 IC
Solution
Approximate Analysis

 The input section of the voltage-divider

configuration can be represented by the
network of Figure
 The resistance Ri is the equivalent resistance
between base and ground for the transistor
with an emitter resistor RE
 If Ri is much larger than the resistance R2 , the
current I B will be much smaller than I 2 (current
always seeks the path of least resistance) and
I 2 will be approximately equal to I 1 .
 If we accept the approximation that I B is The voltage across R 2 , which is
essentially 0 A compared to I 1 or I 2 , then I1
actually the base voltage, can be
= I2, and R 1 and R 2 can be considered series
elements determined using the voltage-
divider rule (hence the name for
the configuration).
 Equation of Approximate Analysis
In other words, if beta times the value of RE is at
least 10 times the value of R 2 , the approximate
approach can be applied with a high degree of
accuracy.

Once V B is determined, the level of V E can be calculated from

and the emitter current can be determined from

Solve Example 1 by Approximate Analysis
Stability factor
Example 3

 Determine the levels of ICQ and VCEQ for

the voltage-divider configuration of
Figure using the exact and approximate
techniques and compare solutions. In
this case, the conditions of approximate
analysis will not be satisfied and the
results will reveal the difference in
solution if the criterion is ignored
Solution
To do list

 Read chapter 4 section 4.6, 4.7, 4.8 and 4.9 (Electronic Circuit and Devices 10th
Edition )
MULTIPLE BJT NETWORKS
The BJT networks introduced
thus far have only been single-
stage configurations
This section will cover some of
the most popular networks using
multiple transistors. It will
demonstrate how the methods
introduced thus far in this
chapter can be applied to
networks with any number of
components
R–C coupled BJT amplifiers.

The R–C coupling of Figure is probably the most

common. The collector output of one stage is fed
directly into the base of the next stage using a
coupling capacitor CC . The capacitor is chosen
to ensure that it will block dc between the stages
and act like a short circuit to any ac signal. The
network of Figure has two voltage-divider stages,
but the same coupling can be used between any
combination of networks such as the fixed-bias or
emitter-follower configurations. Substituting an
open-circuit equivalent for CC and the other
capacitors of the network will result in the two
bias arrangements shown in Figure . The methods
of analysis introduced in this section can then be
applied to each stage separately since one stage
will not affect the other. Of course, the 20 V dc
supply must be applied to each isolated
component.
Darlington

 The Darlington configuration of Fig. 4.66

feeds the output of one stage directly
into the input of the succeeding stage.
Since the output of Fig. 4.66 is taken
directly off the emitter terminal, you will
find in the next chapter that the ac gain
is very close to 1 but the input
impedance is very high, making it
attractive for use in amplifiers operating
off sources that have a relatively high
internal resistance. If a load resistor
were added to the collector leg and the
output taken off the collector terminal,
the configuration would provide a very
high gain.
Deriving the Equation for Darlington
Continuation
Continuation
Cascode

The Cascode
configuration of
Fig. 4.68 ties the
collector of one
transistor to the
emitter of the
other. In essence it
is a voltage-divider
network with a
common-base
configuration at
the collector.
DC Analysis
Continuation
Continuation
To do list

 Read chapter 4 section 4.12 under Direct Couple Amplifier

UNIT TEST 1

 Exam will be available from 5:00 PM to 9 PM