The SIMATIC S7 System Family

The SIMATIC S7 System Family
SIMATIC
PCS 7
SIMATIC
SIMATIC NET
Software
SIMATIC
HMI
SIMATIC
SIMATIC
PC
SIMATIC
WinCC
SIMATIC
DP
SIMATIC
Controller
Knowledge for Automation

SIMATIC S7 Date: 08.12.21
File: Advanced_S7 Training.ppt
SIMATIC Overview
SIMATIC HMI SIMATIC PG

SIMATIC PC
SIEMENS
S IM A T IC O P 17
PG 740
K1 K2 K3 K4 K5 K6 K7 K8 H E LP
S H IF T
K9 K 10 K 11 K 12 K 13 K14 K 15 K 16
E S C
7 8 9 0
D E F AC K
4 5 6 .
A B C
IN S
1 2 3 S H IF T
DE L
H E L P E NT E R
MPI - Network
SIMATIC NET Industrial Ethernet
SIMATIC NET
PROFIBUS
SIMATIC
Controller
SIEMENS SF I0.0 Q0.0 CPU 21 2

RUN I0.1 Q0.1
ST OP I0.2 Q0.2
I0.3 Q0.3
I0.4 Q0.4
I0.5 Q0.5
I0.6
I0.7
SIMATIC
S7-200
PROFIBUS-DP
SIMATIC DP FM
SV
ASI

S7-200
EM 221
SIEMENS SF I0.0 I1.0 Q0.0 Q1.0 CPU 214 DI 8 x DC24V

RUN I0.1 I1.1 Q0.1 Q1.1 I.0
STOP I0.2 I1.2 Q0.2 I.1
I0.3 I1.3 Q0.3 I.2
I0.4 I1.4 Q0.4 I.3
I0.5 I1.5 Q0.5 I.4
I0.6 Q0.6 I.5
I0.7 Q0.7
I.6
SIMATIC
I.7
S7-200

S7-200: Modules
CP242 - 2
EM EM CP

S7-200: CPU Design
Outputs
Memory Card Mode Selector
Potentiometer
SIEMENS SF I0.0 Q0.0 CPU 212

RUN I0.1 Q0.1
STOP I0.2 Q0.2
I0.3 Q0.3
I0.4 Q0.4
I0.5 Q0.5
I0.6
I0.7
SIMATIC
S7-200
PPI Connection
Inputs Status Indicators Status Indicators

for integrated DI/DO

S7-300

S7-300: Modules
PS CPU IM SM: SM: SM: SM: FM: CP:

(optional) (optional) DI DO AI AO - Counting - Point-to-Point
- Positioning - PROFIBUS
- Closed-loop - Industrial Ethernet
control

S7-300: CPU Design
SIEMENS CPU314 SIEMENS CPU315-2 DP
SF SF SF DP
BATF BATF BUSF
DC5V DC5V
FRCE FRCE
RUN RUN
STOP STOP
RUN-P RUN-P
RUN RUN
STOP STOP
M RES M RES
SIMATIC SIMATIC
S7-300 S7-300
Batterie MPI Batterie MPI DP

S7-400

S7-400: Modules
PS CPU SM: SM: SM: SM: CP FM IM

DI DO AI AO

S7-400: CPU Design (Part 1)
D I 3 2 xD C 2 4 V C P U 4 1 4 -2
X 2 X 2
3 4 3 4
421 - 1BL00 - 0AA0 414 - 2XG 00 - 0AB0
INTF INTF DP INTF

EXTF EXTF EXTF
BUSF
FRCE FRCE
CRST CRST
RUN RUN
STOP STOP
CRST
WRST Start-up Type Switch CRST
WRST
RUN-P RUN-P
RUN RUN
STOP
CMRES
Mode Selector STOP
CMRES
X3
X1 X1
EXT.-BATT. EXT.-BATT.
e.g. CPU412-1 5...15V DC 5...15V DC e.g. CPU416-2DP
* for further CPUs please see catalog

S7-400: CPU Design (Part 2)
D I 3 2 xD C 2 4 V C P U 4 1 4 -2
X 2 X 2
3 4 3 4
421 - 1BL00 - 0AA0 414 - 2XG 00 - 0AB0
INTF
EXTF Fault LEDs for INTF
EXTF
DP INTF
EXTF
Fault LEDs for
integrated
BUSF
general CPU faults

FRCE
CRST
FRCE
CRST
DP interface
RUN RUN
STOP STOP
CRST CRST
WRST WRST
RUN-P RUN-P
RUN RUN
STOP STOP
CMRES CMRES
DP interface
Slot for Memory
Card X3
MPI interface
X1 X1
EXT.-BATT. EXT.-BATT.
External battery
supply
5...15V DC 5...15V DC

Programming Devices
PG760
PG740
PG720

The SIMATIC Manager

STEP 7 Project Structure

Exercise: Creating a Project
Enter project
name here
and confirm
with "OK"

Training Units

Configuration of the S7-300 Training Unit
Version A
(16 channel
I/O modules)
Module --> PS CPU DI 16 DI 16 DO 16 DO 16 DI 16 DO 16 AI/AO4

Slot No. --> 1 2 4 5 6 7 8 9 10
I/O Address --> 0 4 8 12 16 20 352
Version B
(32 channel
I/O modules)
Module --> PS CPU DI 32 DO 32 DI8/DO8 AI 2

Slot No. --> 1 2 4 5 6 7
I/O Address --> 0 4 8 304

The Simulator
DI DO
.0 .......... .......... .0
.1 .......... .......... .1
.2 .......... .......... .2
.3 .......... .......... .3 V
.4 .......... .......... .4
.5 .......... .......... .5
.6 .......... .......... .6 -15V...+15V AI2 AO1 -15V...+15V
AI1 AO2
.7 .......... .......... .7
.0 .......... ..........
.0
.1 .......... ..........
.1 AI1 AI2
.2 .......... .......... V
.2
.3 .......... ..........
.3
.4 .......... ..........
.4
.5 .......... .......... AI1 AI2 AO1 AO2
.5
.6 .......... ..........
.6
.7 .......... ..........
.7

Hardware Configuration and Memory Concept

Memory Concept of the S7-300
Load memory:
Blocks:
• Logic blocks
(OB,FC,FB)
• Data blocks
(DB) RAM Flash-
Comments Additional info. EPROM
Symbols Work memory:

• OB,FC,FB
Blocks:
• Logic blocks • DB
n. reten. reten.
(OB,FC,FB)
• Data blocks
(DB) with Power System memory:
ON without • PII, PIQ
battery • M, T, C
backup n. reten. reten.
With Power
Blocks: OFF without
• Logic blocks battery
(OB,FC,FB) Retentive memory: backup
• Data blocks Flash EPROM • Retentive
(DB) Memory Card in PG M, T, C
Additional info. (subsequently • Retent. data blocks
inserted in CPU)
Loading Blocks into /out of Flash EPROM Memory Card
"Load in EPROM" Load memory

Flash EPROM
After inserting
the memory
"Load" Load memory card:
internal RAM memory reset
request
and copying
"Load in PG" in work
Sections memory
relevant for
execution
Work memory
RAM

Hardware Configuration and Parameter Assignment
Configuration Assignment of racks, blocks and distributed

I/O in the Station window of HW Config.
You can select the components from a
hardware catalog.
Parameter-assignment Establishing the characteristics of parameter-

assignable blocks, e.g: startup characteristics,
retentive areas, etc.)
Preset configuration Planned hardware configuration and

parameter assignment.
Actual configuration Actual configuration and parameter assignment

of an existing hardware.

Saving the HW Preset Configuration and Downloading it in Module
Download
(only when CPU
is in STOP mode)

Uploading the HW Actual Configuration to the PG

Editing Blocks

The STEP7 Programming Languages
STL
A I0.0
A I0.1
= Q8.0
FBD
I0.0 &
Q8.0
I0.1 =
LAD
I0.0 I0.1 Q8.0

Starting the LAD/STL/FBD Editor
2x

Components of the LAD/STL/FBD Editor
Declaration
Table
Code Section
Browser
Selecting the Programming Language

Programming in LAD/FBD

Programming in STL

Saving a Block
Current project directory with name of block

Calling a Block in OB1

Downloading Blocks into the PLC

Simple Program Debugging

Exercise: Opening and Editing FC 1

Exercise: Downloading a Block into the PLC
To transmit a block to the CPU...
...or click the

Download
icon...

Editor Customization : "Editor" Tab
(Q4.0)

Editor Customization : "STL" Tab

Editor Customization : "LAD/FBD" Tab

Editor Customization : "Create Block" Tab

Binary Operations
I0.0 I0.1 Q 8.0
Q 8.1 (MCRA)
I 0.0
( MCR< )
I 1.0 I 1.1 Q 8.0

( )
M0.0
I1.2 Q 9.3
SR
S Q
I1.3
R

Binary Logic Operations: AND, OR
Circuit Diag. LAD FBD STL
S1 (I 0.0)
I0.0 I0.1 Q 8.0 I 0.0 & Q 8.0 A I0.0
= A I0.1
AND S2 (I 0.1) I 0.1
= Q 8.0
Q 8.1 Q 8.1 = Q 8.1
=
L1 L2
(Q 8.0) (Q 8.1)
S3
(I 0.2) I0.2 Q 8.2
Q 8.2 O I0.2
S4 I 0.2 >=1
OR = O I0.3
(I 0.3) I 0.3 = Q 8.2
I0.3
L3 (Q 8.2)

Binary Logic Operations: Exclusive OR (XOR)
LAD FBD STL
I 0.4 & A I0.4

I0.4 I0.5 Q 8.0 Q 8.0 AN I0.5
I 0.5 >=1
= O
AN I0.4
I 0.4 & A I0.5
I0.4 I0.5 I 0.5 = Q8.0
Q 8.0 X I0.4
I 0.4 XOR X I0.5
=
I 0.5 = Q8.0

Result of Logic Operation, First Check. Examples
Example 1 Example 2 Example 3
Result of Check
Result of Check
Result of Check
Result of Logic
Result of Logic
Result of Logic
Signal State
Signal State
Signal State
First Check
First Check
First Check
Operation
Operation
Operation
A I 1.0 0 1 1
AN I 1.1 0 1 0
A M 4.0 0 1 1
= Q 8.0
= Q 8.1
A I 2.0 0 1 0

Assignment, Setting, Resetting
LAD FBD STL
I 1.0 I 1.1
Q 8.0 A I 1.0
I 1.0 & A I 1.1
Assignment ( ) Q 8.0
= Q 8.0
I 1.1 =
I 1.2 I 1.3
Q 8.1 I 1.2 A I 1.2
& Q 8.1
Set (S ) A I 1.3
I 1.3 S S Q 8.1
I 1.4 Q 8.1
(R) I 1.4 O I 1.4
>=1 Q 8.1 O I 1.5
Reset I 1.5 R R Q 8.1
I 1.5

Setting / Resetting a Flip Flop
LAD FBD STL
M0.0 M0.0
I1.2 Q 9.3 A I 1.2
SR SR S M 0.0
Dominant S Q I1.2 S
Reset A I 1.3
Q9.3 R M 0.0
I1.3
R = A M 0.0
R I1.3 Q
= Q 9.3
M0.0 M0.0
I1.3 Q 9.3 A I 1.3
Dominant RS RS R M 0.0
R Q I1.3 R
Set A I 1.2
Q9.3 S M 0.0
I1.2
= A M 0.0
S I1.2 S Q
= Q 9.3

Connector
LAD STL
I 1.0 I 1.1 M0.0 I 2.0 I 2.1 M 1.1 Q 4.0

( ) NOT ( ) ( ) A I 1.0
A I 1.1
= M 0.0
A M 0.0
FBD A I 2.0
A I 2.1
NOT
I 1.0 & = M 1.1
M0.0
A M 1.1
I 1.1 &
= Q 4.0
I 2.0 M1.1 Q 4.0
I 2.1 =

Instructions, that Affect the RLO
LAD FBD STL
A I0.0
I0.0 I0.1
Q8.0 I0.0 & A I0.1
NOT Q8.0
NOT ( ) I0.1 = NOT
= Q8.0
CLR not available not available CLR
SET not available not available SET
I1.6 A I1.6
SAVE ( SAVE ) I1.6 & SAVE SAVE
BR Q8.1 Q8.1 A BR
BR ( ) BR = = Q 8.1
15 8 1
Status word
BR RLO

Unconditional Jump (Independent of RLO)
LAD FBD STL
Network 1 Network 1 Network 1

NEW1 NEW1
( JMP ) .... JMP JU NEW1
Network 2 Network 2 Network 2

: : :
: : :
: : :
: : :
Network x Network x Network x
NEW1 NEW1
M69.0 NEW1: AN M5.5

M5.5 I4.7 M5.5 & M69.0 AN I4.7
( ) =
I 4.7 = M69.0

Conditional Jump (Dependent on RLO)
LAD FBD STL
I 0.0 I 0.1 NEW1 I0.0 & A I0.0

Jump if NEW1 A I0.1
RLO=1 (JMP) I0.1 JMP JC NEW1
Jump if I 0.2 I 0.3 I0.2 & A I0.2

NEW2 NEW2
RLO=0 A I0.3
(JMPN) I0.3 JMPN JCN NEW2

RLO - Edge Detection
LAD FBD STL
A I1.0
I1.0 I1.1 M1.0 M8.0 I1.0 &
M1.0 M8.0 A I1.1
P FP M1.0
I1.1 P = = M8.0
I1.0 I1.1 M1.1 M8.1 I1.0 A I 1.0

& M8.1 A I 1.1
M1.1
N FN M1.1
I1.1 N = = M8.1
OB1-Cycle
I1.0
I1.1
RLO
Example
M1.0
M1.1
M8.0
M8.1

Signal - Edge Detection
LAD FBD STL
I1.1 I1.0 & A I1.0

I1.0 M8.0 I1.1 A (
POS POS M8.0 A I1.1
Q
M1.0 M_BIT = FP
M1.0 M_BIT M1.0
)
I1.1 =
I1.0 I1.0 &
M8.1 I1.1 M8.0
NEG A I1.0
Q NEG M8.1
A (
M1.1 M_BIT M1.1 M_BIT = A I1.1
FN
M1.1
I1.0 )
=
I1.1 M8.1
Example M1.0
M1.1
OB1-Cycle
M8.0
M8.1

Digital Operations
M0.0 CMP ==I Q 9.7
IW0 IN1
IW2 IN2
T4
I0.7 S_ODT Q8.5
S Q
S5T#35s TV BI MW0
I0.5
R BCD QW12

Loading and Transferring Data (1)
LAD FBD STL
MOVE MOVE
L +5
EN ENO EN OUT MB5
T MB5
5 IN OUT MB5 5 IN ENO
Examples L +5 // 16-bit constant (Integer)

of Load L L#523123 // 32-bit constant (Double
Integer)
L B#16#EF // byte in hexadecimal form.
L 2#0010 0110 1110 0011 // 16-bit binary value
L 3.14 // 32-bit constant (Real)

Content of Content of
ACCU1 ACCU2
Programm
X X X X X X X X Y Y Y Y Y Y Y Y
:
:
L W#16#CAFE 0 0 0 0 C
0 A
0 F
0 E
0 X X X X X X X X
L W#16#AFFE 0 0 0 0 A
0 F
0 F
0 E
0 0 0 0 0 C A F E
:
:
:

Contents of ACCU1
Program
31 23 15 7 0
L MB 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MB0
31 23 15 7 0
Load 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MB0 MB1
L MW 0
31 23 15 7 0
L MD 0 MB0 MB1 MB2 MB3
T QD 4
QD 4
Transfer T QW 4
QW 4
T QB 4
QB 4

Timers: Time Formats for S5 Timers in STEP 7
102 101 100
Format for time specifications X X
Time base Time value (BCD code)
Timer cell in system data memory X X X X
Time base Time value (Binary number)
ACCU contents after “L T...” X X X X X X
Time value (Binary number)
102 101 100
ACCU contents after “LC T...” X X
Time base Time value (BCD code)

Timers: ON Delay (SD)
LAD FBD STL
T4 T4
I0.7 S_ODT Q8.5 S_ODT A I0.7
S Q I0.7 S BI MW0 L S5T#35s
S5T#35s BI MW0 S5T#35s QW12
SD T4
TV TV BCD
I0.5 Q8.5 A I0.5
R BCD QW12 I0.5 R Q = R T4
L T4
T MW0
RLO at S
LC T4
RLO at R T QW12
A T4
Timer = Q8.5
operation
Example
Data type 0,01s <-- 0 0

0,1s <-- 0 1
“S5TIME” 1s <-- 1 0 Time value: 0 . . . 999
10s <-- 1 1

Timers: Stored ON Delay (SS)
LAD FBD STL
T4 T4 A I0.7
I0.7 S_ODTS Q8.5 S_ODTS L S5T#35s
S Q I0.7 S BI MW0 SS T4
S5T#35s BI MW0 A I0.5
TV S5T#35s TV BCD QW12
I0.5 Q8.5 R T4
R BCD QW12 I0.5 R Q = L T4
T MW0
LC T4
T QW12
A T4
= Q8.5
RLO at S
RLO at R
Timer
operation
Example

Timers: OFF Delay (SF)
LAD FBD STL
T4 T4 A I0.7
I0.7 S_OFFDT Q8.5 S_OFFDT L S5T#35s
S Q I0.7 S BI MW0 SF T4
S5T#35s BI MW0 A I0.5
TV S5T#35s TV BCD QW12
I0.5 Q8.5 R T4
T MW0
LC T4
T QW12
A T4
= Q8.5
RLO at S
RLO at R
Timer
operation
Example

Timers: Extended Pulse (SE)
LAD FBD STL
T4 T4 A I0.7
I0.7 S_PEXT Q8.5 S_PEXT L S5T#35s
S Q MW0 SE T4
I0.7 S BI
S5T#35s TV BI MW0 A I0.5
S5T#35s TV BCD QW12
I0.5 A8.5 R T4
R BCD QW12 I0.5 R = L T4
Q
T MW0
LC T4
T QW12
A T4
= Q8.5
RLO at S
RLO at R
Timer
Operation
Example

Timers: Pulse (SP)
LAD FBD STL
T4 T4 A I0.7
I0.7 S_PULSE Q8.5 S_PULSE L S5T#35s
S Q I0.7 S BI MW0 SP T4
S5T#35s BI A I0.5
TV MW0 S5T#35s TV BCD QW12
I0.5 Q8.5 R T4
T MW0
LC T4
T QW12
A T4
= Q8.5
RLO at S
RLO at R
Timer
operation
Example

Timers: Bit Instructions
LAD FBD STL
Network 1:
T4
I0.0 T4 I0.0 & SD A I0.0
SD L S5T#5s
S5T#5s TV SD T4
S5T#5s
Network 2:
T4 Q 8.0 Q 8.0
A T4
T4 & =
= Q 8.0
Network 3:
T4
I0.1 T4 A I0.1
R I0.1 & R R T4

T4
Exercise
S_PULSE
I 0.7
I 0.7 S BI
TV BCD I 0.5
S5T#5s
I 0.5 R Q Q 8.0 Q8.0
5s
T4
S_PEXT I 0.7
I 0.7 S BI I 0.5
S5T#5s TV BCD
I 0.5 R Q Q 8.0 Q8.0
T4
S_ODT I 0.7
I 0.7 S BI I 0.5
S5T#5s TV BCD
I 0.5 R Q Q 8.0 Q8.0
T4
S_ODTS I 0.7
I 0.7 S BI I 0.5
S5T#5s TV BCD
I 0.5 R Q Q 8.0 Q8.0
T4
S_OFFDT I 0.7
I 0.7 S BI I 0.5
S5T#5s TV BCD
I 0.5 R Q Q 8.0 Q8.0

S5 Counters in STEP 7
LAD FBD STL
A I0.4
C5 C5
CU C5
S_CUD S_CUD A I0.5
I 0.4 Q 8.3
CU Q
Q I 0.4 CU CD C5
A I0.3
I 0.5
L C#20
CD I 0.5 CD
S C5
I 0.3 A I0.7
S I 0.3 S CV MW 4 R C5
L C5
C#20 PV CV MW 4 C#20 PV CV_BCD QW 12 T MW4
I 0.7 Q 8.3 LC C5
R CV_BCD QW 12 I 0.7 R Q
Q = T QW12
A C5
= Q8.3

Counters: Bit Instructions
LAD FBD STL
Network 1: C5
I0.0 SC
I0.0 C5
A I0.0
SC L C#20
C#20 CV
C#20 S C5
Network 2:
C5
I0.1 C5
I0.1 CU A I0.1
CU
CU C5
Network 3:
I0.2 C5 C5
A I0.2
CD I0.2 CD CD C5
Network 4:
C5 Q 4.0 Q 4.0
A C5
C5 = = Q 4.0

Counters: Function Diagram
CU
CD
5
4
3
Count
2
1
0

Conversion Operations BCD <-> Integer
Number Conversion
entered in BCD 0 81 5 BCD->Integer
User program with
Task
integer math
operations
Number Conversion
displayed 0 2 4 8 BCD<-Integer
in BCD
LAD FBD STL
BCD_I BCD_I L IW4

EN ENO EN OUT MW20 BTI
T MW20
IW4 IN OUT MW20 IW4 IN ENO
I_BCD I_BCD L MW10

EN ENO EN OUT QW12 ITB
T QW12
MW10 IN OUT QW12 MW10 IN ENO

Conversion Operations I -> DI -> REAL
Data in integer format

(16 bits)
Conversion from Conversion from Math

Task integer to double integer program
double integer to real number with
real numbers
F AWL
I_DI
B MD14
EN OUT
D DI_R
ENO EN OUT MD26
MW12 IN L MW12
LAD ENO ITD
MD14 IN
DTR
T MD26
I_DI DI_R
EN ENO EN ENO
MW12 IN OUT MD14 MD14 IN OUT MD26

Comparison Operations
LAD FBD STL
M0.0 CMP ==I Q 9.7 CMP ==I A M0.0

A(
L IW0
IW0 IN1
L IW2
IW0 IN1
==I
IW2 IN2 IW2 IN2 )
&
Q9.7
= Q9.7
=
M0.0

Digital Logic Operations
WXOR_W L IW 0
WOR_W
L W#16#5F2A
WAND_W
AW / OW / XOW
EN ENO
T MW10
IW0 IN1
OUT MW10 15 0
W#16#5F2A IN2
IW0 = 0 1 0 0 0 0 0 0 0 0 1 1 0 0 1 0
W#16#5F2A = 0 1 0 1 1 1 1 1 0 0 1 0 1 0 1 0
AND OR XOR
MW10 after “AW” 0 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0
MW10 after “OW” 0 1 0 1 1 1 1 1 0 0 1 1 1 0 1 0
MW10 nach “XOW” 0 0 0 1 1 1 1 1 0 0 0 1 1 0 0 0

Basic Mathematical Functions
LAD FBD STL
ADD_I ADD_I L MW4

Addition EN ENO EN OUT MW6 L MW10
MW4 IN1 MW4 IN1 +I
MW10 IN2 OUT MW6 MW10 IN2 ENO T MW6
SUB_I SUB_I L MW5

Subtrac- MW7
tion EN ENO EN OUT L MW11
MW5 IN1 MW5 IN1 -I
T MW7
MW11 IN2 OUT MW7 MW11 IN2 ENO
MUL_R MUL_R L MD6

Multipli- MD66
cation EN ENO EN OUT L MD12
MD6 IN1 MD6 IN1 *R
MD12 IN2 MD66 MD12 IN2 ENO T MD66
DIV_R DIV_R L MD40

EN OUT MD32
Division EN ENO L MD4
MD40 IN1 MD40 IN1 /R
MD4 IN2 OUT MD32 MD4 IN2 ENO T MD32

Shift Operations (Word / Doubleword)
SHL_W
L MW8 or:
EN ENO
L MW4 L MW4
MW4 IN SLW SLW 2
OUT MW12 T MW12 T MW12
MW8 N
= +2
Shift Left Word: Shift Right Word:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1
IN IN
EN0 =1 EN0 = 0
1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0
OUT OUT

Shift Right Signed Integer
SHR_I
L MW8 or:
EN EN0 L MW4 L MW4
SSI SSI 3
MW4 IN
T MW12 T MW12
MW8 N OUT MW12
= +3
Shift a Signed Integer to the Right:

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 1 0 1
IN IN
EN0 = 0 EN0 = 1
1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1
OUT OUT

Doubleword Rotation Operations
ROL_DW
ENO L MW6 or:

EN
L MD2 L MD2
MD2 IN RLD RLD 4
OUT MD12 T MD12 T MD12
MW6 N
= +4
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IN: 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
Rotate 4 places
to the left :
OUT: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1

SIMATIC S7 OUT Date: 08.12.21
Symbols

Absolute and Symbolic Addressing
A I 0.0 A “PLANT_ON"
= Q8.0 = “ON_INDIC"
A I 0.4 A "M_FORW"
= Q20.5 = "MOTOR_FORW"
Call FC18 Call “COUNT"
Symbol Address Data Type Comment

MOTOR_FORW Q20.5 BOOL Motor forwards
COUNT FC18 FC18 Count bottles
PLANT_ON I 0.0 BOOL Switch on plant
ON_INDIC Q8.0 BOOL Indicator: Plant is “On”
M_FORW I 0.4 BOOL M.-con. switch: Motor forwards
(max. 24 characters) (max. 80 characters)

Symbolic Addressing - Overview
Where are symbols used? Where are they stored? With what are they created?
Global Data: Symbol Table Symbol Editor

- Inputs
- Outputs
- Bit mem., timers, counters
- Peripheral I/O
Local Block Data: Declaration part of Program Editor

- Block parameters the block
- local / temporary data
Jump Labels Code section of Program Editor

the block
Block Names: Symbol Table Symbol Editor
- OB
- FB
- FC
- DB
- VAT
- UDT
Data Block Components Declaration part of the DB Program Editor

Symbol Information (in the LAD/STL/FBD Editor)

Test Functions

Debug - Monitor (Status)

Program Status Modes of Operation

Use of Trigger Points with Program Status

Selecting the Display Information of the Program Status
LAD/STL/FBD Editor -> Options ->Customize ... or
with running status:
right mouse click
on

Activating the "Monitor/Modify Variables" Tool

Setting Trigger Points
PII
Start of cyclic program execution
Cyclic
program
execution
Transition:
RUN --> STOP
End of cyclic
program execution
PIQ

Establishing a Connection to the CPU
Accessible CPUs
Configured
Directly CPU
connected Station 1 (VAT from Station 2 Station 3
CPU HW Station
"Station 2")
PG

Exercise: Combining Program Status and Monitor Variable

Data Storage in Data Blocks

Storage Areas for Data
Bit memories
DBz
PIQ
DBy . .
PII .
DBx
I/O area
L stack Data blocks

Data Blocks (DBs)
Accessible to all blocks
Function
OB1
FC10
Global data
DB20
Function
FC20
Instance DB for FB1
Function Instance data

block
FB1 DB5

Overview of Data Types in STEP 7
Elementary • Bit data types (BOOL, BYTE, WORD, DWORD, CHAR)

data types
• Mathematical data types (INT, DINT, REAL)
(up to 32 bits)
• Time types (S5TIME, TIME, DATE, TIME_OF_DAY)
• Time (DATE_AND_TIME)
Complex
data types • Array (ARRAY)
(longer than 32 bits)
• Structure (STRUCT)
• Character chain (STRING)
User-defined data types

(longer than 32 bits) Data type UDT (User Defined Type)

Elementary Data Types in STEP 7
Keyword Length (in bits) Example of a constant of this type
BOOL 1 1 or 0
BYTE 8 B#16#A9
WORD 16 W#16#12AF
DWORD 32 DW#16#ADAC1EF5
CHAR 8 'w'
S5TIME 16 S5T#5s_200ms
INT 16 123
DINT 32 65539
REAL 32 1.2 or 34.5E-12
TIME 32 T#2D_1H_3M_45S_12MS
DATE 16 D#1993-01-20
TIME_OF_DAY 32 TOD#12:23:45.12

Complex Data Types
Keyword Length (in bits) Example
DATE_AND_TIME 64 DT#97-09-24-12:14:55.0
STRING 8 * (number of ´This is a string´

(character string with characters +2) ´SIEMENS´
max. 254 characters)
ARRAY user-defined Measured values: ARRAY[1..20]

(Group of elements INT
of the same data type)
STRUCT user-defined Motor: STRUCT

(Group of elements Speed : INT
of different data types) Current: REAL
END_STRUCT
UDT UDT as block UDT as array element

(User Defined Data Type = user-defined
“Template" consisting of STRUCT Drive: ARRAY[1..4]
elementary or complex Speed : INT UDT1
data types Current: REAL
END_STRUCT

Example of a Structure
Motor_data
Operating Speed, data type Integer
Rated Current, data type Real Structure with the name "Motor_data"
(several elements
Startup Current, data type Real with different data types)
Turning Direction, data type Bool
Display in the Program Editor (Data block DB 1):

Example of an Array
Measuring_point
1. Measuring_point, data type Real
Array with the name "Measuring_point"
3. Measuring_point, data type Real (several elements
• of the same data type)
•
•
Display in the Program Editor (Data block DB 2):

Functions and Function Blocks

Introduction
Global Variables / Data Local Variables / Data

(valid in the entire program) (only valid in one block)
• PII / PIQ Temporary Variables Static Variables
• I/ O • are deleted after the • are retained even after

associated block is executed the block is executed
•M/T/C
• temporary storage in L stack • permanent storage in DBs
• DB areas
• useable in OBs / FCs / FBs • can only be used in FBs
absolute symbolic
Access

Temporary Variables

Local Data Stack Size
Entire size:
Entire size:
1.5 Kbyte
1.5 Kbyte
(CPU 313..316)
(CPU 313..316)
For S7-300:
Execution
Priority class L stack size
Startup (one-time execution) 27

256 bytes
Cyclic execution 1
Time-of-Day Interrupt 2 256 bytes

Time-controlled
execution Time-Delay Interrupt 3 256 bytes
Cyclic Interrupt 12 256 bytes
Hardware Interrupt 16 256 bytes

Event-driven
execution Error handling in startup 28
256 bytes
Error handling in scan cycle 26

Exercise: Use of Temporary Variables
Replace by the
temporary variable
"Packages"

Example of a Message Display Indicating a Problem in the Process
Task
Disturbance
Acknowledge
Report Memory
LED
Solution Suggestion Report Memory

RS
Edge Mem. Bit Acknowl. R
Disturb. Input P S Q & >=1
Flash Freq.
Report Memory &

Display
Disturb. Input =

Parameter-Assignable Blocks
Non-parameter- Parameter-assignable block

assignable
block Program Call
FC 20
A I 1.2 A #Acknowledge I 1.3 M 40.1
Disturb. Edge
R M 40.0 R #Report Memory input mem.bit
A I 1.3 U #Disturb. input I 1.2 Acknowledge Display A 8.3
FP M 40.1 FP #Edge mem. bit M 10.3 Flash freq.

S M 40.0 S #Report memory M 40.0 Report
memory
A M 40.0 A #Report memory
A M 10.3 A #Flashing freq.
O O
ANM 40.0 AN #Reportmemory Formal parameters
A I 1.3 A #Disturb. input
Actual parameters
= Q 8.3 = #Display

Declaration of the Formal Parameters
Formal parameters
Type of parameter Declaration Use Graphic Display
Input parameter in Read only To the left of the block

Output parameter out Write only To the right of the block
In/out parameter In_out Read / write To the left of the block
Declaration table of the FC 20 block

Using the EN/ENO Parameters with Block Calls
LAD/FBD STL
FC 1
Unconditional call ?? . ? EN ENO CALL FC 1
NOP 0
FC 1 Q 9.0
A I 0.1
Conditional call I 0.1 EN ENO = JNB _001
CALL FC 1
_001: A BR
= Q 9.0
Example
FC 1 FC 2 FC 3
?? . ? EN ENO EN ENO EN ENO =

Exercise: Editing a Function Block
1. Declaration table of the FB 20 block
A #Acknowledge
2. Program section of FB 20 R #Report memory
A #Disturb. ...
:
:

Organization Blocks
FC FB
OB1
Operating
system
FB FC
SFC
SFB
Other
OBs

Overview of the Organization Blocks
Startup
OB 100
OB 101
OB 102
Cyclic Periodic Event-driven

program program program
execution execution execution
OB 1 OB 10...17 OB 20...23 OB 80...87

(Time-of-day
interrupts)
(Time-delay interrupts) (Asynchronous errors)
OB 30...38 OB 40...47 OB 121, 122

(Synchronous errors)
(Cyclic interrupts) (Hardware interrupts)
Interrupt OBs Error OBs

Startup OBs
Restart (manual)
• only for S7-400
Complete restart (according to setting in HW Config):
STOP -> RUN + WRST
automatic manual
S7-300 / 400 S7-300 S7-400 Execution of OB 101

STOP->RUN
Power ON STOP->RUN
+ CRST Process residual scan cycle
Deleting the process images,

Delete PIQ (parameter-assignable)
non-retentive M, T, C
Execution of OB 100 Monitoring time

for restart exceeded ? STOP
yes
no
Enable outputs
Enable outputs
C Read in PII
Y C Read in PII
C Y
Execute OB1 C
L Execute OB1
E L
Output PIQ
E
Output PIQ

Interrupting the Cyclic Program
E.g. OB82 (Prio.26) =

Error handling. E.g. OB10 (Prio.2) =
Executed in event of Time-of-day interrupt.
wire break at analog Executed once a
input PIW 352 minute from 9:30
OB1
is
executed
continu-
ously ..... ...... until it is interrupted
E.g. OB20 (Prio.3) = by another OB
Time-delay interrupt.
Execution starts 3.25s
after a part is OB No. OB Type Priority
detected. OB 1 Cyclic program 1
OB 10 Time-of-day interrupt 2
OB 20 Time-delay interrupt 3
OB 35 Cyclic interrupt 12
OB 40 Hardware interrupt 16
OB 82 Error handling 26 / 28

Time-of-Day Interrupt (OB10)

Cyclic Interrupt (OB35)
RUN OB35 OB35 OB35

Interval Interval Interval
OB1 OB1 O B1 OB1 OB1 OB1 OB1 O B1

Hardware Interrupt (OB40)
HW Config:
Properties of the Properties

analog input module of the CPU
Analog input module
+27648
Upper limit
value
Lower limit
0 value

Time-Delay Interrupt (OB20)
I 0.0 M0.1 SFC 32 M2.0

(P) EN (SRT_DINT) ENO ( )
20 OB_NR RET_VAL MW10
T#500ms DTIME
W#16#01 SIGN

Diagnostic Interrupt, Asynchronous Error Interrupt (OB81...87)
HW Config:
Properties of the Properties

analog input module of the CPU
Analog input module
Wire break
+27648

Analog Value Processing
High level
Level
transmitter
Low level

Measuring Range Module

Analog Module SM335 (Inputs)

Analog Module SM335 (Outputs)

Analog Input Module SM331

Scaling Analog Input Values
500,0
0,0
0 27648

Unscaling a Real Number for Analog Output
27648
0
0,0 100,0

Exercise: Assigning Parameters to the Analog Module SM335

Exercise: Assigning Parameters to the Analog Module SM331

Exercise: Controlling the Level in a Tank
Max. level of 600 l,

equals 10 V at
analog channel 0
Level
transmitter
Min. level 50 l.
When the level falls below
this, a message is to be
output at output Q9.2
(Q 5.2).

Exercise: Diagnostic Interrupt from an Analog Module
Analog input module
When the value measured at an analog

channel of the module exceeds the
overflow range, OB82 is called, as well
as when it re-enters the range.
Task:
Output Q 9.1 (Q 5.1) is to flash as long
Overflow as one of the encoded values is in the
Overrange overflow range.
.
Rated range

Documenting, Saving, Archiving

Overview of Documentation Facilities
 Network title
 Network comment
 Statement comment
 Program overview
 Cross references
 Assignment of I/Q/M/T/C
 Checklists
 Symbol table
 Configuration
 Network configuration

Block Documentation

Print Preview

Page Setup

Other Documentation Facilities
Reference Program structure

data
Cross references
Assignment of Unused addresses

I/Q/M/T/C
Checklists Addresses without

symbols
Symbol table
Configuration
Network
configuration

Saving Programs
Archiving on 1. Select the menu options File -> Archive in the SIMATIC
Diskette Manager
2. Choose the project you want to archive
3. Enter the name of the archive file
Copying Programs 1. Open two windows in the SIMATIC Manager:

onto Memory Cards: One window containing the program to be saved and one
window with S7 Memory Card -> "Memory Card" icon
2. Using the mouse, copy the program you want to save into the
"S7 Memory Card" window
Uploading Programs 1. Create a new program in the SIMATIC Manager

from CPU to PG: 2. Click the "Online" icon
3. Open the S7 program and select Blocks
4. Select the menu options PLC -> Upload in the SIMATIC
Manager OR
1. Select the project in the SIMATIC Manager
2. Select the menu options PLC -> Upload Station

Copying a Program onto a Memory Card

Uploading a Program from the CPU to the PG
System data blocks

System data blocks

Exercise: Achiving a Project

Communication via MPI
P G 72 0

Networking via MPI
S7-300 or S7- 400 S7-300 or S7- 400

CPU 1 CPU 2
2
PG connection via MPI
PLC link via MPI
0
OP connection via MPI
1
P G 7 2 0
n Default MPI address

Exercise: Preparing for Communication
Training Area 1
Station 1
SIEMENS Node No.:.......
CPU-MPI address: .............

PG 740
Training Area 2
Station 2
SIEMENS Node No.:.......
CPU-MPI address: .............
PG 740

Subnets in SIMATIC
P G 7 2 0
OPs PCs, OS PGs
MPI network
Industrial Ethernet
PROFIBUS Point-to-Point
Cell level
-SINUMERIK, RCM
SIMATIC S5 S7-400 M7-400 S7-300 -TI 505
-Other PLC
PROFIBUS-DP
DP/AS-I link
Field level
ET 200C
ET 200B/L
ASI (Actuator Sensor Interface)
AS-I
AS-I
AS-I power supply submodules level
Field device with AS-I ASIC Sensors and Actuators

Troubleshooting

System Diagnostics - Overview
CPU diagnostics detects CPU I/O-Module

a system error
CPU diagnostics detects Diagnostic Diagnostics-
an error in the user program interrupt capable module
detects an
error and
generates a
diagnostic
Error Diagnostic System interrupt
OB buffer status list
SFC
CPU
SIEMENS
messages
PG 740

Searching for Errors, that Cause the CPU to Stop
U
CP

Calling the "Module Information" Tool

Module Information Tab: "Diagnostic Buffer"

Interpreting Error Messages

Opening a Block Containing an Error

Logical Errors
??

Displaying Reference Data

Filtering Reference Data

Cross References

Block Correction using Cross References
2x

Assignment of I,Q,M,T,C

Unused Symbols / Addresses without Symbols

Program Structure

Comparing Blocks (1)
...see
next page

Sporadic Errors

Displaying CPU Messages

Writing User Messages in the Diagnostic Buffer
CPU Node
e.g. PG, OP
Send buffer
SEND =
TRUE
1 2
SFC 52 Sending
asynchronous
to user program
Diagnostic buffer

Configuring Your Own Message Texts

System Information

System Information - Overview

Still have
questions ?
We‘ll help you!
... with the info-line:
Tel: +92 51 2272200-14

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The SIMATIC S7 System Family

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Knowledge for Automation

SIMATIC HMI SIMATIC PG

SIEMENS SF I0.0 Q0.0 CPU 21 2

Knowledge for Automation

SIEMENS SF I0.0 I1.0 Q0.0 Q1.0 CPU 214 DI 8 x DC24V

Knowledge for Automation

Knowledge for Automation

SIEMENS SF I0.0 Q0.0 CPU 212

Inputs Status Indicators Status Indicators

Knowledge for Automation

Knowledge for Automation

PS CPU IM SM: SM: SM: SM: FM: CP:

Knowledge for Automation

SIEMENS CPU314 SIEMENS CPU315-2 DP

Batterie MPI Batterie MPI DP

Knowledge for Automation

Knowledge for Automation

PS CPU SM: SM: SM: SM: CP FM IM

Knowledge for Automation

INTF INTF DP INTF

e.g. CPU412-1 5...15V DC 5...15V DC e.g. CPU416-2DP

* for further CPUs please see catalog

Knowledge for Automation

general CPU faults

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Module --> PS CPU DI 16 DI 16 DO 16 DO 16 DI 16 DO 16 AI/AO4

Module --> PS CPU DI 32 DO 32 DI8/DO8 AI 2

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Symbols Work memory:

"Load in EPROM" Load memory

Knowledge for Automation

Configuration Assignment of racks, blocks and distributed

Parameter-assignment Establishing the characteristics of parameter-

Preset configuration Planned hardware configuration and

Actual configuration Actual configuration and parameter assignment

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

I0.0 I0.1 Q8.0

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

Knowledge for Automation

To transmit a block to the CPU...

...or click the

Knowledge for Automation

Knowledge for Automation