1

Prof. Dr. Nizamettin AYDIN

naydin@yildiz.edu.tr
naydin@ieee.org
http://www.yildiz.edu.tr/~naydin
Biomedical Instrumentation
Amplifiers and Signal Processing
Applications of Operational Amplifier
In Biological Signals and Systems
The three major operations done on biological
signals using Op-Amp:

Amplifications and Attenuations
DC offsetting:
add or subtract a DC
Filtering:
Shape signals frequency content

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Ideal Op-Amp
Most bioelectric signals are small and require amplifications
Op-amp equivalent circuit:







The two inputs are u
1
and u
2
. A differential voltage between them causes
current flow through the differential resistance R
d
. The differential voltage
is multiplied by A, the gain of the op amp, to generate the output-voltage
source. Any current flowing to the output terminal v
o
must pass through the
output resistance R
o
.
4
Inside the Op-Amp (IC-chip)





20 transistors
11 resistors
1 capacitor
5
Ideal Characteristics






A = (gain is infinity)
V
o
= 0, when v
1
= v
2
(no offset voltage)
R
d
= (input impedance is infinity)
R
o
= 0 (output impedance is zero)
Bandwidth = (no frequency response limitations) and no
phase shift

6
Two Basic Rules







Rule 1
When the op-amp output is in its linear range, the two input terminals
are at the same voltage.
Rule 2
No current flows into or out of either input terminal of the op amp.

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Inverting Amplifier








(a) An inverting amplified. Current flowing through the input
resistor R
i
also flows through the feedback resistor R
f
.
(b) The input-output plot shows a slope of -R
f
/ R
i
in the central
portion, but the output saturates at about 13 V.
8
R
i
u
i
u
o
i
R
f
i
+

(a)
10 V
10 V
(b)
u
i
u
o
Slope = -R
f
/ R
i
-10 V
-10 V
i
f
i
o
i
i
f
o
R
R
v
v
G v
R
R
v = = =
Summing Amplifier

9
|
|
.
|

\
|
+ =
2
2
1
1
R
v
R
v
R v
f o
u
1
u
o

+
R
2
R
1
R
f
u
2
Example 3.1
The output of a biopotential preamplifier that
measures the electro-oculogram is an undesired
dc voltage of 5 V due to electrode half-cell
potentials, with a desired signal of 1 V
superimposed. Design a circuit that will
balance the dc voltage to zero and provide a
gain of -10 for the desired signal without
saturating the op amp.

10
Answer 3.1
We assume that v
b
, the balancing voltage at v
i
=5 V. For v
o
=0,
the current through R
f
is zero. Therefore the sum of the currents
through R
i
and R
b
, is zero.
11
u
i
v
b
u
i
u
o
u
o

+
+15V
+10
0
Time
u
i
+ u
b
/2
-10
(a) (b)
5 kO
-15 V
R
b
20 kO
R
i
10 kO
R
f
100 kO
V
o
l
t
a
g
e
,

V

O =

=

= = +
4
4
10 2
5
) 10 ( 10
0
i
b i
b
b
b
i
o
v
v R
R
R
v
R
v
Follower ( buffer)
Used as a buffer, to prevent a high source resistance
from being loaded down by a low-resistance load. In
another word it prevents drawing current from the
source.

12
u
o
u
i

+

1 = = G v v
i o
Noninverting Amplifier

13
u
o
10 V
10 V
u
i
Slope = (R
f
+ R
i
)/ R
i
-10 V
-10 V
R
f
u
o
u
i
i
+
-
i
R
i
|
|
.
|

\
|
+ =
+
=
+
=
i
f
i
i f
i
i
i f
o
R
R
R
R R
G v
R
R R
v 1
Differential Amplifiers
Differential Gain G
d



Common Mode Gain G
c
For ideal op amp if the inputs are equal
then the output = 0, and the G
c
= 0.
No differential amplifier perfectly rejects
the common-mode voltage.
Common-mode rejection ratio CMMR
Typical values range from 100 to 10,000

Disadvantage of one-op-amp differential amplifier is its low
input resistance
14
3
4
3 4
R
R
v v
v
G
o
d
=

=
v
3
v
4
) (
3 4
3
4
v v
R
R
v
o
=
c
d
G
G
CMRR =
Instrumentation Amplifiers




Differential Mode Gain





Advantages: High input impedance, High CMRR, Variable gain

15
1
1 2
2 1
4 3
1 2 1
2 1 2 4 3
2
) (
R
R R
v v
v v
G
iR v v
R R R i v v
d
+
=

=
=
+ + =
Comparator No Hysteresis

u
o
u
i
u
ref
10 V
-10 V
-10 V
v
2
+15
-15
u
i
u
o

+
R
1
R
1
R
2
u
ref
If (v
i
+v
ref
) > 0 then v
o
= -13 V else v
o
= +13 V
R
1
will prevent overdriving the op-amp
v
1
> v
2
, v
o
= -13 V
v
1
< v
2
, v
o
= +13 V
Comparator With Hysteresis
Reduces multiple transitions due to mV noise levels
by moving the threshold value after each transition.







Width of the Hysteresis = 4V
R3

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u
i
u
o

+
R
1
R
1
R
2
R
3
u
ref
u
o
u
i
- u
ref
10 V
-10 V
With hysteresis
-10 V 10 V
Rectifier






Full-wave precision rectifier:
For u
i
> 0, D
2
and D
3
conduct, whereas
D
1
and D
4
are reverse-biased.
Noninverting amplifier at the top is active

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10 V
(b)
-10 V
u
o

u
i
-10 V 10 V
(a)
D
2
v
o
u
i


+
xR (1-x)R

+
(a)
D
3
R
R
u
i

+
D
2
D
1
D
4
xR
(1-x)R
x
v
v
i
o
=
Rectifier






Full-wave precision rectifier:
For u
i
< 0,
D
1
and D
4
conduct, whereas D
2
and D
3
are
reverse-biased.
Inverting amplifier at the bottom is active
19
10 V
(b)
-10 V
u
o

u
i
-10 V 10 V

+
(a)
D
3
R
R
u
i

+
D
2
D
1
D
4
xR
(1-x)R
x
v
v
i
o
=
(b)
D
4
v
o
u
i


+
xR
i
R
One-Op-Amp Full Wave Rectifier






For u
i
< 0, the circuit behaves like the inverting
amplifier rectifier with a gain of +0.5. For u
i
> 0, the
op amp disconnects and the passive resistor chain
yields a gain of +0.5.

20
(c)
D
v
o
u
i


+
R
i
= 2 kO R
f
= 1 kO
R
L
= 3 kO
Logarithmic Amplifiers
Uses of Log Amplifier
Multiply and divide variables
Raise variable to a power
Compress large dynamic range into small ones
Linearize the output of devices






(a) A logarithmic amplifier makes use of the fact that a transistor's V
BE
is
related to the logarithm of its collector current.
For range of I
c
equal 10
-7
to 10
-2
and the range of v
o
is -.36 to -0.66 V.

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(a)
R
f
I
c
R
f
/9
u
o

R
i
u
i

+
|
|
.
|

\
|

=
13
10
log 06 . 0
i
i
o
R
v
v
|
|
.
|

\
|
=
S
C
BE
I
I
V log 06 . 0
Logarithmic Amplifiers






(a) With the switch thrown in the alternate position, the
circuit gain is increased by 10. (b) Input-output
characteristics show that the logarithmic relation is
obtained for only one polarity; 1 and 10 gains are
indicated.

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(b)
10 V
-10 V
v
o
u
i

-10 V
1
10
10 V
(a)
R
f
I
c
R
f
/9
u
o

R
i
u
i

+
V
BE
V
BE
9V
BE
Integrators

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f f
c
i
f
i
o
C R
f
R
R
v
v
t 2
1
=

=
for f < f
c

( )
( )
( )
( )
C R j
R
R
j V
j V
C R R j R
R
j V
j V
Z
Z
j V
j V
v dt v
C R
v
i
f
i
i
o
i f i
f
i
o
i
f
i
o
t
ic i
f i
o
e
e
e
e e
e
e
e
+

=
+

=
=
+ =
}
1
) (
) (
1
1
0
A large resistor R
f
is used to prevent saturation










A three-mode integrator
With S
1
open and S
2
closed, the dc circuit behaves as an inverting amplifier.
Thus u
o
= u
ic
and u
o
can be set to any desired initial conduction. With S
1

closed and S
2
open, the circuit integrates. With both switches open, the
circuit holds u
o
constant, making possible a leisurely readout.
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Differentiators
A differentiator
The dashed lines indicate that a small capacitor must
usually be added across the feedback resistor to prevent
oscillation.

25
RC j
j V
j V
Z
Z
j V
j V
dt
dv
RC v
i
o
i
f
i
o
i
o
e
e
e
e
e
=
=
=
) (
) (
) (
) (
Active Filters- Low-Pass Filter
A low-pass filter attenuates high frequencies
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( )
( )
f f i
f
i
o
C R j R
R
j V
j V
e e
e
+

= = =
1
1
G Gain
|G|
freq
f
c
= 1/2tR
i
C
f
R
f
/R
i
0.707 R
f
/R
i
+

R
i
R
f
(a)
u
i
u
o
Active Filters (High-Pass Filter)
A high-pass filter attenuates low frequencies
and blocks dc.
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C
i
+

R
i
u
i
u
o
(b)
R
f
( )
( )
i i
i i
i
f
i
o
C R j
C R j
R
R
j V
j V
e
e
e
e
+

= = =
1
G Gain
|G|
freq
f
c
= 1/2tR
i
C
f
R
f
/R
i
0.707 R
f
/R
i
Active Filters (Band-Pass Filter)
A bandpass filter attenuates both low and high
frequencies.
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( )
( ) ( )( )
i i f f
i f
i
o
C R j C R j
C R j
j V
j V
e e
e
e
e
+ +

=
1 1
|G|
freq
f
cL
= 1/2tR
i
C
i
R
f
/R
i
0.707 R
f
/R
i
f
cH
= 1/2tR
f
C
f
+

u
i
u
o

(c)
R
f
C
i
R
i
C
f
Frequency Response of op-amp and Amplifier
Open-Loop Gain
Compensation
Closed-Loop Gain
Loop Gain
Gain Bandwidth Product
Slew Rate

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Input and Output Resistance

30
d
i
i
ai
R A
i
v
R ) 1 ( + =
A
A
=
+

R
d
i
i

R
o
R
L
C
L
i
o

Au
d

u
d

u
o
u
i
+

1 +
=
A
A
=
A
R
i
v
R
o
o
o
ao
Typical value of R
d
= 2 to 20 MO
Typical value of R
o
= 40 O
Phase Modulator for Linear variable differential
transformer LVDT

31
+
-
+
-
Phase Modulator for Linear variable differential
transformer LVDT

32
+
-
+
-
Phase-Sensitive Demodulator

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Used in many medical
instruments for signal detection,
averaging, and Noise rejection
The Ring Demodulator
If v
c
is positive then D
1
and D
2
are forward-biased and v
A
= v
B
. So v
o
= v
DB
If v
c
is negative then D
3
and D
4
are forward-biased and v
A
= v
c
. So v
o
= v
DC

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