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Andhra Pradesh
Name : P. Srinivasa Rao
Designation : Lecturer
Branch : Electronics & Communication Engg.
Institute : Andhra Polytechnic, Kakinada
Year/Semester : III semester
Subject : Digital Electronics
Subject code : CM-305
Topic : Counters & Registers
Duration : 50mts
Sub topic : UP/DOWN counter
Teaching Aids : PPT Diagrams
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OBJECTIVES
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Recollection
1. What is up counter?
It is the counter which is capable of progressing in the
forward direction, through a certain counting sequence.
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UP/DOWN SEQUENCE FOR A 3-BIT BINARY
COUNTER
Clock UP QC QB QA DOWN
pulse
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1CM305.531 1 6
Principle of 3-bit UP/DOWN counter
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• In this counter flip flop in the lower order position is
complemented with every clock pulse .
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UP MODE OF OPERATION
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• The output of Qc changes its state on the next
clock pulse when QA=QB=1.
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CONDITIONS FOR UP MODE OF OPERATION:
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DOWN MODE OF OPERATION:
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CONDITIONS FOR DOWN MODE OF OPERATION
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TIMING DIAGRAM
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Note from the Timing diagram
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SUMMARY
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QUIZ
a) up counter
b) Down counter
c) decade counter
d) ripple counter
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1. Preset and clear inputs are called
d) synchronous inputs
f) asynchronous inputs
c) control inputs
d) timing inputs
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3. In the case of up operation Up / Down pin becomes
a) 0
b) 1
c) High
d) both b & c
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4. In Mod-16 up counter the no. of flip-flops are
a) 1
b) 2
h) 3
j) 4
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Questions
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