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Power Amplifiers
David Fernandez
Outline
Power Amplifier Critical Factors for
Performance
LDMOS Device Technology
LDMOS Power Amplifier performance
Future trends and challenges for LDMOS
References
RF Power Amplifier
Power Amplifier Critical Factors
Linearity Critical when signal contains both
amplitude and phase modulation
!4er Efficiency Defined as Pout/Pdc
reak D4n V4tage Cellular Base Station
application have supply voltages of near 30V.
igh Frequency parasitic capacitances
should be minimal.
ain
C48t
Integrated
LDMOS Device Technology
Channel formed by difference in lateral extension of P-
base and N+ source regions
Both regions self-aligned to left-hand side during ion-
implantation
P-sinker, highly doped, connects source to substrate
creating source connected ground plane
LDMOS Device Technology
Shield between gate and drain to reduce feedback
capacitance and combat threshold 'drift'.
LDD region formed by light N-type dopant
Doping of the LDD region strongly correlated with
breakdown voltage
RF LDMOS Power Amplifier
Better Linearity as a result of shielding
High electric field at gate edge in LD-Mosfet results in
electron injection into gate oxide leading to vthreshold
drift which deteriorates linearity. Shielding mitigates.
Reduction of feedback capacitance improves linearity
RF LDMOS Power Amplifier
Better Gain and Cost accomplished through
directly grounding source.
With direct source grounding as compared to
other power mosfets, no inductive bond-wires
needed to connect source to package ground
terminal. Source inductance deteriorates gain at
high frequencies.
No complex and costly packaging needed to
keep drain insulated from ground terminal
drain and ground terminal are on opposite sides
of wafer.
RF LDMOS Power Amplifier
Lateral expansion smaller channel length,
resulting in higher frequency potential :
Higher Break down voltage (75 0 V) as a
result of proper doping of LDD region:
2
9
8
5.34*10 `13
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