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ANDHRA PRADESH
Name : K.Suguna
Designation : Lecturer
Branch : Computer Engineering
Institute : GPT, Anantapur
Year/Semester : III – Semester
Subject : Computer Architecture
Subject Code : CM-303
Topic : I/O Organization
Duration : 50 mints
Sub Topic : Interrupt initiated I/O
Teaching Aids : ppt, Animations
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Recap
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Objective
On completion of this period, you would be able to
understand
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DMA (Direct Memory Access)
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Direct Memory Access (DMA)
Contd..
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Direct Memory Access (DMA) Contd..
-Burst transfer
-Cycle stealing
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Bus request (BR)
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Bus grant (BG)
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Burst transfer
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Cycle stealing
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Quiz
1. DMA means
a. discrete method access
b. Direct memory access
c. Direct memory available
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2. Bus Request (BR) signal is a
a. input signal to CPU
b. Output signal to CPU
c. Input signal to DMA
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3. To transfer data DMA uses
a. burst transfer
b. cycle stealing
c. All the above
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4. Bus grant (BG) signal is a
a. Input signal to DMA
b. Output signal of DMA
c. Input signal to CPU
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Summary
At the end of this class the student will be able
to understand
Basics of DMA
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Frequently Asked Questions
1. What is the importance of DMA
2. Explain the terms
a. Bus request
b. Bus grant
3. List the methods used by DMA for data transfer
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