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a group of wire between two part of hardware There are three main bus groups
ADDRESS BUS DATA BUS CONTROL BUS
2/3 of compter times is used for data transfer therefor the data bus bandwidth is very important.
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Microprocessors 1
Data Bus
The Data Bus carries the data which is transferred throughout the system. ( bi-directional) Examples of data transfers
Program instructions being read from memory into MPU. Data being sent from MPU to I/O port Data being read from I/O port going to MPU Results from MPU sent to Memory
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Microprocessors 2
Address Bus
An address is a binary number that identifies a specific memory storage location or I/O port involved in a data transfer The Address Bus is used to transmit the address of the location to the memory or the I/O port.
The Address Bus is unidirectional ( one way ): addresses are always issued by the MPU.
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Microprocessors 3
Control Bus
The Control Bus: is another group of signals whose functions are to provide synchronization ( timing control ) between the MPU and the other system components.
Control signals are unidirectional, and are mainly outputs from the MPU. Example Control signals
RD: read signal asserted to read data into MPU WR: write signal asserted to write data from MPU
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Microprocessors 4
Main memory
The duties of the memory are :
To store programs To provide data to the MPU on request To accept result from the MPU for storage ROM : read only memory. Contains program (Firmware). does not lose its contents when power is removed (Non-volatile) RAM: random access memory (read/write memory) used as variable data, loses contents when power is removed volatile. When power up will contain random data values
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Microprocessors 5
Read-Only Memory
MP can read instructions from ROM quickly Cannot write new data to the ROM ROM remembers the data, even after power cycled Typically, when the power is turned on, the microprocessor will start fetching instructions from the still-remembered program in ROM (bootstrap )
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Microprocessors 6
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Microprocessors 7
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Microprocessors 8
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Microprocessors 9
Block Diagram
External Interrupts
Interrupt Control
4k ROM
Timer 0 Timer 1
CPU
OSC
Bus Control
4 I/O Ports
Serial
P0 P2 P1 Addr/Data
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P3
TXD RXD
Microprocessors 10
RD,WR
Code memory is selectable by EA (internal or external) We may have External memory as data and code
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Microprocessors 11
Microprocessors 12
89xx
Example (AT89C51,AT89LV51,AT89S51)
AT= ATMEL(Manufacture) C = CMOS technology LV= Low Power(3.0v)
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Microprocessors 13
RAM
128 128 128 256 256 256
Timer
2 2 2 3 3 3
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Microprocessors 14
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Microprocessors 15
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Microprocessors 16
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5
(WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
8051
(8031) (8751) (8951)
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)
Microprocessors 17
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Port 0
pins 32-39 P0.0P0.7 8-bit R/W - General Purpose I/O Or acts as a multiplexed low byte address and data bus for external memory design
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Microprocessors 19
Port 2 pins 21-28P2.0 P2.7 8-bit R/W General Purpose I/O Or high byte of the address bus for external memory design
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Microprocessors 20
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Microprocessors 21
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Microprocessors 22