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INTRODUCERE
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Tehnologia VLIW (Very Long Instruction Word) prin care
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Limea magistralei
de sistem
8 bii
16 bii
16 bii
16 bii
32 bii
32 bii
32 bii
32 bii
32 bii
32 bii
32 bii
64 bii
64 bii
64 bii
64 bii
64 bii
64 bii
64 bii
64 bii
64 bii
64 bii
Viteza pe magistrala
de sistem
4.77 MHz
8 MHz
12 MHz
16 MHz
25 MHz
33 MHz
25 MHz
50 MHz
33 MHz
40 MHz
33 MHz
60 MHz
66 MHz
55 MHz
66 MHz
60 MHz
66 MHz
66 MHz
66 MHz
75 MHz
66 MHz
Tip chipset
82440BX82440GX
Viteza pe magistrala
sistem
100 MHz
Viteza UCP
350, 400, 450 MHz
Via MVP3ALi
Aladdin V
82450NX
100 MHz
100 MHz
82440JX
133 MHz
200 MHz
Introducere
Introducere
Magistrala de I/E
An
apariie
Lime
magistral
PC i XT
1980-82
8 bii
ISA (AT)
Magistral simpl
MCA
Magistral inteligent
realizat de IBM
EISA
Magistral inteligent
pentru servere.
VL
Magistral de mare
vitez, utilizat n 486s
PCI
Magistral inteligent de
mare vitez
USB
Magistral inteligent,
simpl i modern
FireWire (IEEE1394)
Magistral inteligent de
mare vitez pentru video,
memorare etc.
1984
16 bii
Sincron cu UCP:
4.77 i 6 MHz
Asincron: 8 MHz
1987
32 bii
Asincron: 10 MHz
40 MBps
1988
32 bii
Asincron: 8 MHz
32 MBps
1993
32 bii
Sincron cu UCP:
33, 40, 50 MHz
100-160
MBps
1993
32 bii
Asincron: 33 MHz
132 MBps
1997
Serial
1.2 MBps
1999
Serial
80 MBps
Viteza magistral
4-6 MBps
8 MBps
Introducere
UC
UP
D
Memorie
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