PROIECTAREA CIRCUITELOR NUMERICE

CU STRUCTURI PROGRAMABILE DE TIP

CPLD (CONTINUARE)



1. Scopul lucrrii
Elaborarea unui proiect nou i programarea circuitului CPLD de pe placa
Digilent XCRP, folosind mediul ISE 8.1 (sau ISE WebPack) de la firma Xilinx.

2. Aparate necesare
- calculator compatibil Pentium, minim 500MHz, minim 256MB RAM
- mediul de programare ISE (Integrated Software Environment)-versiunea
6.1i sau mai mare, furnizat de firma Xilinx, instalat pe o platform
Windows 2000 (SP2 sau SP3) sau XP. Programul poate fi instalat i pe
sistemele de operare Linux sau Solaris.
- modulul Digilab XCRP, echipat cu circuitul integrat XCR3064XL.
- alimentator de reea pentru modulul Digilab XCRP.
- cablu de conectare a modulului cu calculatorul pe portul paralel.

3. Consideraii teoretice
Structura platformei Digilab XCRP, furnizat de firma Digilent, a fost
prezentat n laboratorul de data trecut. Aceast plac conine un circuit integrat
XCR3064XL montat n soclu. Circuitul este un CPLD programabil prin semnale de la
portul paralel al calculatorului, conform standardului JTAG IEEE 1149.1. El conine
64 macrocelule programabile i 1600 de pori logice echivalente, fiind programabil de
circa 1000 de ori.
Etapele de proiectare n mediul ISE 6.1 i de programare a circuitului au fost
prezentate data trecut. Urmrind aceste etape, se cere proiectarea unui sistem
numeric simplu i implementarea lui n circuitul integrat CPLD de pe acest modul.

4. Modul de lucru
4.1. Se reia punctul 4.6 din referatul de laborator de data trecut. Se
proiecteaz manual un circuit simplu i se editeaz schema logic folosind editorul
grafic de scheme logice din mediul ISE 6.1 (sau superior). Se parcurg apoi toate
etapele indicate n referat. Dac dorii s simulai funcionarea circuitului, se poate
face verificarea urmrind formele de und n timp, folosind mediul ModelSim (vezi
referatul primei lucrri de laborator). Dac considerai c circuitul este prea simplu i
nu necesit verificarea funcionrii prin simulare, atunci lansai procesul Configure
Device (iMPACT), care programeaz circuitul integrat. Nu mai rmne dect s
verificai funcionarea corect a acestuia.

Anexe: (vezi paginile urmtoare)

1
D Di ig gi il le en nt t X XC CR RP P B Bo oa ar rd d
All-in-one board featuring the Xilinx CoolRunner CPLD

www. di gi l ent i nc. com


The CPLD-based XCRP development board
provides a platform that can be used to
implement digital circuits of all kinds, from
complex combinational logic to sequential
machines and controllers. The all-in-one
XCRP board features a 64 macrocell, 1600
gate Xilinx CoolRunner CPLD and several
useful I/O devices. The XCRP can run on 2
AA batteries or a wall-plug power supply
(included). It works seamlessly with Xilinxs
free WebPack tools, and it ships with a
programming cable, so designs can be
completed anywhere a PC exists with no
additional costs. The XCRP provides an
ideal platform for engineers who want to
learn digital design techniques using
modern technologies.

FEATURES AND BENEFITS

64 macrocell, 1600 gate Xilinx XCR3064
CPLD with non-volatile, indefinite storage
of designs
Can be used with the included power
supply, or run more than 60hrs on 2 AA
cells
User-settable oscillator (0.5Hz to 4KHz
range)
JTAG programming using a standard
parallel cable (included)
Two high-bright seven-segment displays
Four de-bounced buttons
Eight slide switches
Eight LEDs in three colors (red, green,
and yellow)
An integral solderless breadboard so that
expansion circuits can be constructed
right on the XCRP board
40-pin expansion connector

APPLICATIONS

Provides ideal platform for learning
about digital circuits and modern design
methods
Low-cost introduction to Xilinx devices
and tools


Expansion
Connector
Solderless
breadboard
XCR3064XL CoolRunner
CPLD PC-44 (socketed)
Power
jack
5-9VDC
3.3VDC
regulator
2 AA
cells
Vcc
Adjustable clock
(0.5Hz to 4KHz)
JTAG
port
P
a
r
a
l
l
e
l

P
o
r
t
2 7-seg.
displays
8 switches
8 LEDs
4 buttons
Debounce


di gi l ent, i nc.
Design Resources for Digital Engineers | www.digilentinc.com
125 SE High Street | Pullman, WA 99163 | (509) 334-6306 (Voice and Fax)

Digilent, Inc., 2002 Document: 502-021


Digilab XCRP Reference Manual
Revision: August 30, 2002


Overview

The Digilab XCRP (XCRP) circuit board
featuring the Xilinx CoolRunner XC3064
CPLD provides a very low cost platform that
can be used to implement a wide variety of
digital circuits, from complex combinational
devices to sequential machines and controllers.
The XCRP board provides an ideal platform for
new engineers requiring experience with basic
digital design techniques, as well as those
needing exposure to Xilinx CAD tools and
CPLD devices. XCRP board features include:

A socketed Xilinx XCR3064 CPLD;
Non-volatility designs remain in the
CPLD after power is removed;
On board voltage regulator for use with a
wall-plug transformer, or the board can run
more than 60hrs on 2 AA cells (typical);
Expandability an integral solderless
breadboard allows expansion circuits to be
constructed right on the XCRP board;
An user-adjustable oscillator circuit
(approximately 0.5Hz to 4KHz);
JTAG programming using a standard
parallel cable (included);
Two high-bright seven segment displays;
Four debounced buttons;
Eight slide switches;
Eight LEDs in three colors (red, green, and
yellow);
40-pin expansion connector.


The DXCR board makes an excellent platform
for instructional-lab based work: it is fully
compatible with all versions of the Xilinx CAD
tools, including the free WebPack tools
available at the Xilinx website; the included
CPLD uses non-volatile configuration memory,
so designs can be completed outside the lab;
and the board ships with a programming cable
and a power source, so designs can be
implemented immediately without the need for
any additional hardware.



Adjustable clock
(0.5Hz to 4KHz)
2 AA
cells
Expansion
Connector JTAG
port
P
a
r
a
l
l
e
l

P
o
r
t
8 LEDs
2 7-seg.
displays
8 switches
4 buttons
External
power
Vcc
Debounce
Xilinx XCR3064
CoolRunner CPLD
PC44
Solderless
breadboard


Figure 1. XCRP circuit board block diagram
Digilab XCRP Reference Manual

Digilent, Inc.

Rev: Apr 1, 2002 www.digilentinc.com Page 2 of 7

Functional description

The XCRP board has been designed to offer a low-cost system for designers who need a flexible
platform to gain exposure to the basics of digital design or to CPLD devices. The XCRP board
provides sufficient I/O devices so that many interesting circuits can be implemented without the need
for any other devices. All
CPLD signals are routed to an
expansion connector so that
designs can easily be extended
using the on-board solderless
breadboard, or by attaching
accessory boards. The board
can run on two AA cells, so
designs are portable. It includes
a XCR3064 CoolRunner
CPLD, a JTAG configuration
circuit that uses a standard
parallel cable, an user-settable
oscillator circuit, and several
useful I/O devices.

Table 1 shows all signals routed
on the XCRP board. These
signals and their circuits are
described in the following
sections.



Parallel port and FPGA configuration circuit

The XCRP board uses a DB-25 parallel port connector to route JTAG programming signals from a
host computer to the CPLD. The programming circuit simply connects the parallel port pins driven by
the Xilinx CAD tools directly to the CPLD programming pins, making the board fully compatible with
all Xilinx programming tools.

To configure the board from a computer using the JTAG mode, ensure the circuit is powered either by
batteries or by an external power supply. Before running Xilinxs iMPACT programmer tool to
download a bit file, ensure that the JTAG start-up clock is selected in the Generate Programming
File properties dialog box. Attach the programming cable, and start the iMPACT programmer. The
board will be auto-detected by the Xilinx software, and all normal JTAG operations will be available.
Operations are available in a pull-down menu made visible by right clicking on the device graphic in
the iMPACT programmer window.

Programming circuit detail is shown below.


Power Supplies
VBAT Battery voltage
VEXT External voltage applied to J4
VCC System voltage at SW9, equal to either VBAT or VEXT
GND System ground routed to all devices
Programming parallel port
TDI JTAG data input signal
TCK JTAG clock signal
TMS JTAG test mode select signal
TDO JTAG data out signal
On board devices
MCLK Master clock from user-settable oscillator circuit
BTN1-4 Debounced button inputs
SW1-8 Slide switch inputs
LED1-8 Individual LED drive signals
CAT1, 2 Common cathode signals for seven-segment displays
AA-AG Anode signals for seven segment displays
Expansion Connector
NA All named signals routed to expansion connector (except MCLK)
Table 1. XCRP board signal definitions
Digilab XCRP Reference Manual

Digilent, Inc.

Rev: Apr 1, 2002 www.digilentinc.com Page 3 of 7














Figure 2. Parallel port connectors and signals


Oscillator

The XCRP board provides an user-adjustable
oscillator that can produce a clock signal in the
0.5 to 4KHz range. The oscillator circuit uses
an auto-feedback Schmidt-trigger inverter, with
a variable resistor and fixed 4.7uF capacitor in
the feedback path. The variable resistor is a 15-
turn precision potentiometer that can be
adjusted from 0 to 500K ohms, providing an
RC time constant that varies by several orders of magnitude. This clock source provides an adequate
frequency range for experiments that run from human time (i.e., less than 1 Hz) to the audio range.
The oscillator output drives the CLK0 input of the CPLD via a second Schmidt trigger.

Pin 1
Pin 25
Top view of hole pattern, with
cable attaching from this side

Pin 13 Pin 1
Pin 14
Pin 25
DB25 parallel port connector
Front view

1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

GND
DB25
connector
Pull-up resistors are used on all programming
signals. They are not shown here.
PD2
PD1
PD0
TMS
TCK
TDI TDO
Cable detect
PSEL
PD6
P32
P7
P13
P38
Xilinx
XCR3064
Coolrunner
CPLD
MCLK
User
Adjust


Figure 3. Oscillator circuit
Digilab XCRP Reference Manual

Digilent, Inc.

Rev: Apr 1, 2002 www.digilentinc.com Page 4 of 7
Power Supplies

The XCRP board can be powered from any wall-plug transformer that uses a 2.1mm center-positive
jack, and that produces at least 100mA in the 5VDC to 9VDC range. The board can also be powered
from 2AA cells or any other power source that outputs at least 100mA at 2.5 to 4.0 volts. The
secondary power source connector bypasses the on-board regulators, so if that connector is used,
ensure that no more than 4VDC is applied to the board. During operation, the board consumes less
than 80mA with all LEDs and LED segments illuminated.

LEDs

Eight LEDs (four red, two yellow, and two green) are
provided for circuit outputs. LED anodes are driven directly
from the CPLD via 470-ohm resistors, and the cathodes are
connected directly to ground. The CPLD connection point is
also available at the expansion connector via a 470-ohm
resistor. Three colors are offered so that circuits like traffic
light controllers or basic meters can easily be implemented.
A ninth LED is also provided as a power-on LED.

Pushbutton

Four debounced pushbuttons are provided for
circuit inputs. Buttons are debounced with an
RC-Schmidt trigger circuit so that they may be
used as clocks for basic sequential circuits.
Button outputs (at the output of the Schmidt
trigger) are normally low, and they are driven
high only when the button is pressed. Button
outputs are available at the expansion connector.


Slide Switches

Eight slide switches are provided for circuit inputs. The slide
switches use a 4.7Kohm series resistor for nominal input
protection. Switch outputs are available at the expansion
connector.


Seven Segment Display

The XCRP board contains a modular 2-digit, common cathode, seven-segment LED display. In a
common cathode display, the seven cathodes of the LEDs forming each digit are connected to a
common circuit node. On the XCRP board, the two-digit display has two common cathode nodes
labeled CAT1 and CAT2. Both cathodes, and therefore both digits, can be independently turned on and
off by driving the CAT1/2 signals to a 1 or a 0 respectively. The anodes of similar segments on
470 ohms
Expansion
Connector
Figure 4.
LED circuit
CPLD
From
470 ohms
To CPLD &
expansion
connector
4.7K ohms
0.1uF Figure 5.
Pushbutton circuit
4.7K ohms

4.7K ohms
Figure 6. Slide switch circuit
To CPLD &
expansion
connector

Digilab XCRP Reference Manual

Digilent, Inc.

Rev: Apr 1, 2002 www.digilentinc.com Page 5 of 7
both displays are also connected together into seven common circuit nodes labeled AA through AG.
Thus, each anode for both displays can be turned on and off independently. This connection scheme
creates a multiplexed display, where driving the cathode signals and corresponding anode patterns of
each digit in a repeating, continuous succession can create a stable 2-digit display. Even though each
digit is illuminated only half time, the human eye will be tricked into seeing continuously
illuminated digits (this phenomenon is used by all multiplexed displays, including televisions,
computer monitors, and motion pictures). To appear bright and continuously illuminated, both digits
should be driven once every 1 to 16ms (for a refresh frequency of 1KHz to 60Hz). For example, in a
60Hz refresh scheme, each digit would be illuminated for of the refresh cycle, or 8ms.

Figure 7. (a) Seven segment display detail.
(b) common cathode display configuration.
(c) segement illumination patterns for decimal
digits. (d) segment illumination truth table.
Common
cathode
Digit Illuminated Segment
Shown a b c d e f g
0
1 1 1 1 1 1 0
1 0 1 1 0 0 0 0
2 1 1 0 1 1 0 1
3 1 1 1 1 0 0 1
4 0 1 1 0 0 1 1
5 1 0 1 1 0 1 1
6 1 0 1 1 1 1 1
7 1 1 1 0 0 0 0
8 1 1 1 1 1 1 1
9 1 1 1 1 0 1 1
a
f
e
d
c
b
g
a f g e d c b
(a) (b)
(c) (d)


A display controller must assure that the correct anode pattern is present when the corresponding
cathode signal is driven. To illustrate the process, if CAT1 is driven high while AB and AC are driven
high, then a 1 will be displayed in digit position 1. Then, if CAT2 is driven high while AA, AB and
AC are driven high, then a 7 will be displayed in digit position 2. If ACAT1/AB, AC are driven for
8ms, and then CAT2/AA, AB, AC are driven for 8ms in an endless succession, the display will show
17 and the observer cannot tell that both digits are not continuously illuminated. An example timing
diagram is provided below.

Cathodes connected to ground via two transistors
driven from the CPLD and expansion connectors
CAT1
CAT1
CAT2
Anodes Digit 1 Digit 2 Digit 1 Digit 2
Refresh period = 1ms to 16ms
Digit period = Refresh / 2
Anodes are connected to CPLD via 470-ohm resistors (and to
expansion connectors via more 470 ohm resistors)
CAT2
aa ab ac ad ae af ag
Timing diagram showing multiplex timing requirements
470 ohms
100 ohms
Expansion
Connector
CPLD
From

Figure 8. Dual-digit common cathode display and timing diagram


Digilab XCRP Reference Manual

Digilent, Inc.

Rev: Apr 1, 2002 www.digilentinc.com Page 6 of 7

The seven-segment display anodes are driven from the CPLD pins via 470 resistors, and the cathodes
are driven by two 2N3904 NPN transistors to supply the required cathode current. The 3904 bases are
driven from the CPLD via 100-ohm resistors. The CPLD connection point is also available at the
expansion connector via a 470-ohm resistor.

Expansion connector

An expansion connector labeled J3 on the
board edge has been provided so that
designs can easily be extended beyond the
XCRP board. The connector uses a 2 x 20,
100-mil spaced grid so that standard headers
or sockets may easily be loaded (no
expansion connector is loaded during
manufacturing to allow greater flexibility).
All available CPLD signals are routed to the
connector, including signals that drive on-
board devices. Where feasible, on-board
devices are decoupled from the CPLD with
series resistors so that all pins may be used
as inputs or outputs by the expansion
connector. VCC and GND are also routed to
the connector so that attached devices can
draw power from the DXCR board.


CPLD

The Xilinx CoolRunner XCR3064 CPLD on the XCRP board uses a
44-pin PLCC package, with four used for VCC connections, three for
GND, and five for JTAG programming. All remaining 32 I/O pins are
routed to the expansion connector, and 31 are also routed to on-board
devices (4 for pushbuttons, 8 for slide switches, 8 for LEDs, 10 for the
seven-segment device and one for the system clock). The block
diagram (right) shows all connections between the CPLD and the
devices on the board. CPLD pin connections are shown in the
following table.

The CPLD device can be configured using the Xilinx JTAG tools and
a parallel cable connecting the XCRP board and the host computer. A
separate JTAG header that connects directly to the JTAG pins is also
provided so the Xilinx programming cable can be used.

The XCRP board can also accommodate a XCR3032 CPLD.
For further information on the CoolRunner CPLD, please see the
Xilinx data sheets available at the Xilinx website (www.xilinx.com).

Expansion
Connector
32
Xilinx
XCR3064
CoolRunner
CPLD
Slide
switches
Push
buttons
LEDs
7-seg
display
4
8
8
10
Clock


Figure 9. CPLD connections
Table 2. Digilab XCR board expansion connector pinout
Pin Signal Pin Signal Pin Signal Pin Signal
1 GND 11 SW4 21 AD 31 NC
2 NC 12 LED5 22 BTN2 32 SW5
3 VCC 13 LED9 23 AC 33 NC
4 LED1 14 LED6 24 BTN3 34 SW6
5 SW1 15 AG 25 AB 35 NC
6 LED2 16 LED7 26 BTN4 36 SW7
7 SW2 17 AF 27 AA 37 NC
8 LED3 18 LED8 28 CAT1 38 SW8
9 SW3 19 AE 29 NC 39 NC
10 LED4 20 BTN1 30 CAT2 40 IO1


Digilab XCRP Reference Manual

Digilent, Inc.

Rev: Apr 1, 2002 www.digilentinc.com Page 7 of 7





Table 3. Digilab XCR board CPLD pinout
Pin Function Pin Function Pin Function Pin Function
1 BTN1 12 SW8 23 VCC 34 LED7
2 MCLK 13 TMS 24 AF 35 VCC
3 VCC 14 SW7 25 AE 36 LED5
4 BTN4 15 VCC 26 AD 37 LED4
5 SW1 16 SW6 27 AC 38 TDO
6 SW2 17 SW5 28 AB 39 LED3
7 TDI 18 CAT1 29 AA 40 LED2
8 SW3 19 CAT2 30 GND 41 LED1
9 SW4 20 LED9 31 LED8 42 GND
10 PORTEN 21 AG 32 TCK 43 BTN3
11 IO1 22 GND 33 LED6 44 BNT2

2/17/2004 03:59:22p /Boards/Work/XCRP/DlabXcrP.sch (Sheet: 1/3)
2/17/2004 03:59:22p /Boards/Work/XCRP/DlabXcrP.sch (Sheet: 2/3)
2/17/2004 03:59:22p /Boards/Work/XCRP/DlabXcrP.sch (Sheet: 3/3)