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Fundamental components:
>
Memory
Peripherals
: >
6 (
Arhitectura Harvard
Magistralele de date si de instructiuni sunt separate fizic;
Se pot accesa simultan memoriile de program si de date;
Deoarece exist
a dou
a magistrale de date, l
atimea de band
a este m
arit
a;
Arhitectura Harvard
Data
Memory
Program
Memory
CPU
8
16
CPU
8
Program
and
Data
Memory
Shift/Rotate
Load/Store
Add
Subtract
Multiply
Divide
AND
OR
XOR
...
Stack PUSH
Stack POP
Load
Store
...
Compare instructions . . .
Move instructions . . .
Branch instructions . . .
...
Byte
0
Halfword
Word
7
15
31
Memoria
Processor
Cache L3
Cache L2
Cache L1
Main
Memory
Secondary/Tertiary
Storage
Instruction set: A PIC's instructions vary from about 35 instructions for the low-end PICs to over 80 instructions for
the high-end PICs. The instruction set includes instructions to perform a variety of operations on registers directly,
the accumulator and a literal constant or the accumulator and a register, as well as for conditional execution, and
program branching.
it
Functionality
-b
16
dsPIC33
dsPIC30
PIC24H
PIC24F
it
8-b PIC16
PIC18
PIC12
PIC10
Performance
PIC32
128
Memory (Kbytes)
64
32
Functionality
High-Performance
PIC18
8-bit Data,
16-bit Instruction
16
8
Mid-Range
PIC16
8-bit Data,
14-bit Instruction
PIC12
Baseline
8-bit Data,
12-bit Instruction
PIC10
Performance
14
18
28
40
Pins
64
84
100
ROM
[Kbytes]
RAM
[bytes]
Pins
Clock A/D
A/D
Comparators
[MHz] Inputs Resolution
8/16-bit
Timers
Serial Communications
PWM
Outputs
Others
0.375-0.75
0.75-1.5
0.75-3
1.5
16-24
25-38
25-134
25
0-2
0-3
0-3
-
8
8
8
-
0-1
0-1
0-2
-
1x8
1x8
1x8
1x8
EEPROM
EEPROM
Vdd=15V
0-4
0-4
0-13
0-12
10
10
8 or 10
10
1
1
0-2
2
1-2 x 8, 1 x 16
1-2 x 8, 1 x 16
1-2 x 8, 1 x 16
2 x 8, 1 x 16
0-1
0-1
0-3
-
EEPROM
-
10 or 12
10
10
0-3
2
2
0-5
2-5
2
6-8
8
14-44
18-20
4-8
4-8
20
20
1.75-3.5
1.75
1.75-14
1.75-3.5
64-128
64
64-368
64-128
8
8
14-64
14-20
20
20
20
20
4-128
8-128
8-64
PIC16F767
PIC16F877
PIC16F877A
PIC16F887
PIC16F87
PIC16F689
PIC16F874
PIC16F874A
PIC16F883
PIC16F884
PIC16F639
PIC16F628A
PIC16F677
PIC16F722
PIC16F684
MC
PIC16F716
PIC16F687
PIC16F870
PIC16HV616 HV
PIC16F819
PIC16F785
PIC16F872
PIC16HV785 HV
PIC16F882
MC
PIC12F635
PIC16F627A
PIC16F630
PIC16F818
PIC16F676
PIC16F84A
PIC16HV610 HV
PIC16F84
PIC16F871
PIC16F59
PIC16F631
PIC18F14K50 U
PIC18F14K22
PIC12HV609 HV
PIC16F54
0.375
PIC10F200
PIC10F204
6-Pin
Pin Count
8-Pin
14-Pin
18-Pin
20-Pin
28-Pin
40-Pin
64-Pin
PIC18F1220
PIC18F1230 MC
PIC18F13K50 U
PIC18F13K22
18-Pin
20-Pin
U
U
C
U
U
U
MC
U
C
MC
PIC18F4682 C
PIC18F4610
PIC18F4620
PIC18F4680 C
PIC18F46J11
PIC18F46J50 U
PIC18F46K20
PIC18F4515
PIC18F4525
PIC18F4585
PIC18F4510
PIC18F4520
PIC18F4523
PIC18F4550
PIC18F4553
PIC18F4580
PIC18F45J10
PIC18F45J11
PIC18F45J50
PIC18F45K20
PIC18F4455
PIC18F4458
PIC18F4410
PIC18F4420
PIC18F4423
PIC18F4431
PIC18F4450
PIC18F4480
PIC18F44J10
PIC18F44J11
PIC18F44J50
PIC18F44K20
PIC18F4320
PIC18F4321
PIC18F4331
PIC18F43K20
PIC18F2220
PIC18F2221
PIC18F4220
PIC18F4221
28-Pin
40-Pin
PIC18F6622
PIC18F6680
PIC18F66J10
PIC18F66J11
PIC18F66J50
PIC18F66J60
PIC18F66J90
PIC18F6527
PIC18F6585
PIC18F65J15
PIC18F6520
PIC18F65J10
PIC18F65J11
PIC18F65J50
PIC18F65J90
U
U
C
LCD
HV High Voltage
MC Motor Control
Legend:
C CAN
Ethernet
LCD
MC Motor Control
U
E
L
C
U
L
PIC18F8622
PIC18F8680
PIC18F86J10
PIC18F86J11
PIC18F86J50
PIC18F86J60
PIC18F86J90
PIC18F8527
PIC18F8585
PIC18F85J15
PIC18F8520
PIC18F85J10
PIC18F85J11
PIC18F85J50
PIC18F85J90
PIC18F96J60 E
U
E
L
C
U
L
U
U
U
MC
U
C
PIC18F6410
PIC18F6490
PIC18F6493
PIC18F64J11
PIC18F64J90
L
L
L
PIC18F8410
PIC18F8490 L
PIC18F8493 L
PIC18F84J11
PIC18F84J90 L
MC
PIC18F6310
PIC18F6390
PIC18F6393
PIC18F63J11
PIC18F63J90
L
L
L
PIC18F8310
PIC18F8390 L
PIC18F8393 L
PIC18F83J11
PIC18F83J90 L
Pin Count
64-Pin
Legend:
USB
80-Pin
100-Pin
PIC10F220
PIC18F1320
PIC18F1330 MC
PIC18F96J65 E
U
E
PIC10F222
0.375
PIC12F508
PIC10F206
0.75
0.75
0.875
PIC16F83
PIC10F202
16
PIC16F526
PIC16F506
PIC12F519
PIC16HV540 HV
PIC12F510
0.875
PIC16F505
U
E
U
E
L
16
PIC12F509
1.5
1.5
PIC12HV615 HV
U
E
L
24
PIC16F84A
PIC12F675
PIC18F2515
PIC18F2525
PIC18F2585
PIC18F2510
PIC18F2520
PIC18F2523
PIC18F2550
PIC18F2553
PIC18F2580
PIC18F25J10
PIC18F25J11
PIC18F25J50
PIC18F25K20
PIC18F2455
PIC18F2458
PIC18F2410
PIC18F2420
PIC18F2423
PIC18F2431
PIC18F2450
PIC18F2480
PIC18F24J10
PIC18F24J11
PIC18F24J50
PIC18F24K20
PIC18F2320
PIC18F2321
PIC18F2331
PIC18F23K20
1.75
1.75
PIC12F629
PIC16F610
PIC16F914
24
MC
PIC18F4685
32
PIC12F615
PIC18F2682
PIC18F2610
PIC18F2620
PIC18F2680
PIC18F26J11
PIC18F26J50
PIC18F26K20
PIC16F57
PIC12F609
100-Pin
PIC18F97J60 E
48
PIC16F628
MC
3.5
3.5
PIC16F72
MC
PIC16F636
PIC18F2685
80-Pin
PIC18F8722
PIC18F8723
PIC18F87J10
PIC18F87J11
PIC18F87J50
PIC18F87J60
PIC18F87J90
PIC18F8627
PIC18F8628
PIC18F86J15
PIC18F86J16
PIC18F86J55
PIC18F86J65
64
PIC16F747
PIC16F873A
PIC16F616
MC
MC
64-Pin
PIC18F6722
PIC18F6723
PIC18F67J10
PIC18F67J11
PIC18F67J50
PIC18F67J60
PIC18F67J90
PIC18F6627
PIC18F6628
PIC18F66J15
PIC18F66J16
PIC18F66J55
PIC18F66J65
PIC16F74
MC
PIC16F873
PIC16F913
PIC12F683
40-Pin
PIC16F724
PIC16F73
PIC16F737
PIC16F690
PIC16F917
28-Pin
80
PIC16F88
PIC16F723
PIC16F685
20-Pin
96
PIC16F648A
PIC16F777
PIC16F886
PIC16F916
PIC16F688
MC
PIC16F876
PIC16F876A
18-Pin
Pin Count
128
PIC16F77
14
PIC16F76
128
64-Pin
PIC16F946
40-Pin
PIC16F727
14
28-Pin
PIC16F726
96
20-Pin
80
18-Pin
64
14-Pin
48
8-Pin
32
6-Pin
Pin Count
RB7/PGD
MCLR/VPP/THV
28
RB7/PGD
39
RB6/PGC
RA0/AN0
27
RB6/PGC
RA1/AN1
38
RB5
RA1/AN1
26
RB5
RA2/AN2/VREF-
37
RB4
RA2/AN2/VREF-
25
RB4
RA3/AN3/VREF+
36
RB3/PGM
RA3/AN3/VREF+
24
RB3/PGM
RA4/T0CKI
35
RB2
RA4/T0CKI
23
RB2
RA5/AN5/SS
34
RB1
RA5/AN5/SS
22
RB1
RE0/RD/AN5
33
RB0/INT
VSS
21
RB0/INT
RE1/WR/AN6
32
VDD
OSC1/CLKIN
20
VDD
RE2/CS/AN7
10
31
VSS
OSC2/CLKOUT
10
19
VSS
VDD
11
30
RD7/PSP7
RC0/T1OSO/T1CKI
11
18
RC7/RX/DT
VSS
12
29
RD6/PSP6
RC1/T1OSI/CCP2
12
17
RC6/TX/CK
OSC1/CLKIN
13
28
RD5/PSP5
RC2/CCP1
13
16
RC5/SDO
OSC2/CLKOUT
14
27
RD4/PSP4
RC3/SCK/SCL
14
15
RC4/SDI/SDA
RC0/T1OSO/T1CKI
15
26
RC7/RX/DT
RC1/T1OSI/CCP2
16
25
RC6/TX/CK
RC2/CCP1
17
24
RC5/SDO
RC3/SCK/SCL
18
23
RC4/SDI/SDA
RD0/PSP0
19
22
RD3/PSP3
RD1/PSP1
20
21
RD2/PSP2
DIP40
PIC16F876/874
RA0/AN0
PIC16F877/873
MCLR/VPP/THV
DIP28
SPI
USART
I2C
T0 T1 T2
SFR
RAM
(386)
Timers
Internal
Oscillator
Serial
Communication
10-bit A/D
Converter
CCP1, CCP2
Vref
CCP/PWM
modules
CPU
(35 instructions)
PWM
EEPROM (256)
Interrupts
WDT
Port B
Port C
PIC 16F887
Memory
RESET
Program
Memory 8K
Port D
Port E
Power Supply
2 - 5.5V
RISC architecture
35 instructions
All single-cycle instructions (4 clock cycles)
except branches and skips
One accumulator (W)
Operating frequency 0-20 MHZ
Precision internal oscillator
Factory calibrated
Software selectable frequency range of 8MHz
to 31KHz
Bank 1
INDF
00h
TMR0
01h
PCL
02h
STATUS
03h
<--
Bank 2
80h
OPTION_REG 81h
<--
82h
Bank 3
<--
100h
<--
180h
<-- Bank0
101h
<-- Bank1
181h
<--
102h
<--
182h
PIC16F877 SFR
<--
83h
<--
103h
<--
183h
FSR
04h
<--
84h
<--
104h
<--
184h
PORTA
05h
TRISA
85h
00h
105h
00h
185h
Unimplemented
PORTB
06h
TRISB
86h
<-- Bank0
106h
<-- Bank1
186h
PORTC
07h
TRISC
87h
00h
107h
00h
187h
PORTD
08h
TRISD
88h
00h
108h
00h
188h
PORTE
09h
TRISE
89h
00h
109h
00h
189h
PCLATH
0Ah
<--
8Ah
<--
10Ah
<--
18Ah
INTCON
0Bh
<--
8Bh
<--
10Bh
<--
18Bh
PIR1
0Ch
PIE1
8Ch
EEDATA
10Ch
EECON1
18Ch
PIR2
0Dh
PIE2
8Dh
EEADR
10Dh
EECON2
18Dh
TMR1L
0Eh
PCON
8Eh
EEDATH
10Eh
Reserved
18Eh
TMR1H
0Fh
00h
8Fh
EEADRH
10Fh
Reserved
18Fh
T1CON
10h
00h
90h
110h
190h
TMR2
11h
SSPCON2
91h
111h
191h
T2CON
12h
PR2
92h
112h
192h
SSPBUF
13h
SSPADD
93h
113h
193h
SSPCON
14h
SSPSTAT
94h
114h
194h
CCPR1L
15h
00h
95h
115h
CCPR1H
16h
00h
96h
116h
CCP1CON
17h
00h
97h
RCSTA
18h
TXSTA
98h
TXREG
19h
SPBRG
99h
119h
199h
RCREG
1Ah
00h
9Ah
11Ah
19Ah
CCPR2L
1Bh
00h
9Bh
11Bh
19Bh
CCPR2H
1Ch
00h
9Ch
11Ch
19Ch
CCP2CON
1Dh
00h
9Dh
11Dh
19Dh
ADRESH
1Eh
ADRESL
9Eh
11Eh
ADCON0
1Fh
ADCON1
9Fh
11Fh
GPR
(80 Bytes)
20h
GPR
(80 Bytes)
A0h
GPR
(16 Bytes)
70h
6Fh
7Fh
<--
Efh
F0h
Ffh
General
Purpose
Register
(16 Bytes)
GPR
(80 Bytes)
<--
117h
118h
120h
16Fh
170h
17Fh
195h
196h
General
Purpose
Register
(16 Bytes)
197h
198h
19Eh
19Fh
GPR
(80 Bytes)
<--
1A0h
1EFh
1F0h
1FFh
Sleep
OSC2
8 MHz
HFINTOSC
4 MHz
8 MHz
2 MHz
Divider
1/N
1 MHz
500 kHz
LFINTOSC
250 kHz
31 kHz
125 kHz
31 kHz
Internal Oscillator
111
CPU
110
101
100
011
010
001
000
Power-up Timer
Watchdog Timer
Fail-Safe Clock
Monitor
IRCF2
IRCF1 IRCF0
SCS
OSCCON Register
Programmer
(Config word)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Features
Bit name
Legend
R/W
(1)
Readable/Writable bit
After reset, bit is set
PS2
PS1
PS0
TMR0
WDT
1:2
1:1
1:4
1:2
1:8
1:4
1:16
1:8
1:64
1:32
1:128
1:64
1:256
1:28
T0SE - TMR0 Source Edge Select bit selects pulse edge (rising or falling) counted by the timer TMR0 through the RA4/T0CKI pin.
1 - Increment on high-to-low transition on TOCKI pin.
0 - Increment on low-to-high transition on TOCKI pin.
PSA - Prescaler Assignment bit assigns prescaler (only one exists) to the timer or watchdog timer. Prescaler rate is selected by combining
these three bits. As shown in the table below, prescaler rate depends on whether prescaler is assigned to the timer (TMR0) or watch-dog timer
(WDT).
1 - Prescaler is assigned to the WDT.
0 - Prescaler is assigned to the Timer0 module.
R/W (1)
R/W (1)
R/W (0)
R (1)
R (0)
R (0)
R/W (0)
Features
IRCF2
IRCF1
IRCF0
OSTS
HTS
LTS
SCS
Bit name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Legend
R/W
R
(0)
(1)
Bit is unimplemented
Readable/Writable bit
Readable bit
After reset, bit is cleared
After reset, bit is set
IRCF2
IRCF1
IRCF0
Frequency
Oscillator
8 MHz
HFINTOSC
4 MHz
HFINTOSC
2 MHz
HFINTOSC
1 MHz
HFINTOSC
500 kHz
HFINTOSC
250 kHz
HFINTOSC
125 kHz
HFINTOSC
31 kHz
LFINTOSC
EC mode
CPU
OSC1 pin
20-30pF
CPU
OSC1 pin
OSC.
DC-20MHz
OSC2 pin
OSC2 pin
OSC.
GND
I/O
20-30pF
Cuar
EC mode uses external oscillator as a clock source. The maximum
frequency of this clock is limited to 20 MHz.
+5V
+5V
RC mode
5-100K
Fosc
OSC1 pin
CPU
RCIO mode
5-100K
OSC1 pin
OSC.
20pF
Fosc
CPU
OSC.
20pF
OSC2 pin
OSC2 pin
GND
GND
I/O
Fosc/4
RCIO mode. The RC circuit is connected to the OSC1 pin. The available
OSC2 pin is used as an additional general-purpose I/O pin.
INTOSCIO mode
CPU
OSC1 pin
OSC1 pin
I/O
INT.
OSC.
Fosc
CPU
I/O
Fosc
OSC2 pin
OSC2 pin
INT.
OSC.
I/O
Fosc/4
8 MHz
LFINTOSC
Postscaler
HFINTOSC
CPU
4 MHz
2 MHz
1 MHz
500 kHz
250 kHz
125 kHz
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
31 kHz
OSCCON Register
IRCF2
IRCF1
IRCF0
SCS
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
Features
TUN4
TUN3
TUN2
TUN1
TUN0
Bit name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Legend
Bit is unimplemented
Readable/Writable bit
After reset, bit is cleared
TUN3
TUN2
TUN1
TUN0
Frequency
Maximal
CPU
OSC.
FSCM
R/W
(0)
TUN4
HFINTOSC
31 kHz
(32uS)
1/64
488 Hz
(2mS)
LFINTOSC
OSCCON
Calibrated
Minimal
5 VDC
1
11
32
13
20 MHz
14
33 pF
33 pF
12
31
PIC
16F877
TRISA (B, C, D, E)
CPU
PORTA (B, C, D, E)
Pins
5V
TTL
5V
Sensor
ANSELH
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
Features
ANS7
ANS6
ANS5
ANS4
ANS3
ANS2
ANS1
ANS0
Bit name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
Features
ANS13
ANS12
ANS11
ANS10
ANS9
ANS8
Bit name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The ANSEL and ANSELH registers are used to configure the input mode
of an I/O pin to analog or digital.
To configure a pin as an analog input, the appropriate bit of the ANSEL or
ANSELH registers must be set (1). To configure a pin as a digital input/
output, the appropriate bit must be cleared (0).
Legend
R/W
(1)
Bit is unimplemented
Readable/Writable bit
After reset, bit is set
The state of the ANSEL bits has no influence on digital output functions.
The result of any attempt to read a port pin configured as an analog input
will be 0.
Output
PORT
Input
0
A/D,
C1, C2
ANSEL
0
1
TRIS
Pin
PIC16F887: portul A
PORTA
TRISA
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
RA7
RA6
RA5
RA4
RA3
RA2
RA1
RA0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port A is an 8-bit wide, bidirectional port. Bits of the TRISA and ANSEL
registers control the Port A pins. All Port A pins act as digital inputs/outputs.
Five of them can also be analog inputs (denoted by AN):
RA0 = AN0 (determined by the ANS0 bit of the ANSEL register)
RA1 = AN1 (determined by the ANS1 bit of the ANSEL register)
RA2 = AN2 (determined by the ANS2 bit of the ANSEL register)
RA3 = AN3 (determined by the ANS3 bit of the ANSEL register)
RA5 = AN4 (determined by the ANS4 bit of the ANSEL register)
ANSEL
Features
Bit name
Features
Bit name
Legend
R/W
(x)
(1)
Readable/Writable bit
After reset, bit is unknown
After reset, bit is set
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
Features
ANS7
ANS6
ANS5
ANS4
ANS3
ANS2
ANS1
ANS0
Bit name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The ANSEL register are used to configure the input mode of an I/O pin to analog or digital.
To configure a pin as an analog input, the appropriate bit of the ANSEL register must be set (1). To configure a pin as a digital input/output,
the appropriate bit must be cleared (0).
The state of the ANSEL bits has no influence on digital output functions. The result of any attempt to read a port pin configured as an analog
input will be 0.
PIC16F887: portul B
PORTB
TRISB
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port B is an 8-bit wide, bidirectional port. Bits of the TRISB and ANSELH
registers control the Port B pins. All Port B pins act as digital inputs/outputs.
Five of them can also be analog inputs (denoted by AN):
RB0 = AN12 (determined by the ANS12 bit of the ANSELH register)
RB1 = AN10 (determined by the ANS10 bit of the ANSELH register)
RB2 = AN8 (determined by the ANS8 bit of the ANSELH register)
RB3 = AN9 (determined by the ANS9 bit of the ANSELH register)
RB4 = AN11 (determined by the ANS11 bit of the ANSELH register)
RB5 = AN13 (determined by the ANS13 bit of the ANSELH register)
Features
Bit name
Features
Bit name
Legend
R/W
(x)
(1)
Bit is unimplemented
Readable/Writable bit
After reset, bit is unknown
After reset, bit is set
Each port B pin has an additional function related to some of the built-in peripheral units.
ANSELH
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
Features
ANS13
ANS12
ANS11
ANS10
ANS9
ANS8
Bit name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The ANSELH register are used to configure the input mode of an I/O pin to analog or digital.
PIC16F887: portul B
WPUB
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
WPUB7
WPUB6
WPUB5
WPUB4
WPUB3
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
All the port B pins have built in pull-up resistors, which make them ideal
for connection to push buttons (keyboard), switches and optocouplers.
In order to connect these resistors to the microcontroller ports, the
appropriate bit of the WPUB register should be set.
R/W (1)
R/W (1)
R/W (1)
WPUB2 WPUB1
Bit 2
WPUB0
Bit 1
Features
Bit name
Bit 0
Legend
R/W
(1)
Readable/Writable bit
After reset, bit is set
VCC
VCC
MCU
PORT B
PORT B
VCC
MCU
Digital output
PIC16F887: portul B
IOCB
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
IOCB7
IOCB6
IOCB5
IOCB4
IOCB3
IOCB2
IOCB1
IOCB0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Apart from the bits of the WPUB register, there is another bit affecting
the installation of all pull-up resistors, the RBPU bit of the OPTION_REG.
If enabled, each port B bit configured as an input may cause an interrupt
by changing its logic state. In order to enable pins to cause an interrupt,
the appropriate bit of the IOCB register should be set.
Thanks to these features, the port B pins are commonly used for checking
push buttons on the keyboard because they unerringly register any button
press. Thus, there is no need to scan these inputs all the time. When the
X, Y and Z pins are configured as outputs set to logic one (1), it is only
necessary to wait for an interrupt request which arrives upon any button
press. After that, by combining zeros and ones on these outputs it is
checked which push button is pressed.
Bit name
Legend
R/W
(0)
Readable/Writable bit
After reset, bit is cleared
1K
RB0
1K
RB1
1K
RB2
The RB0/INT pin is the only true external interrupt source. It can be
configured to react to signal raising edge (zero-to-one transition) or signal
falling edge (one-to-zero transition). The INTEDG bit of the OPTION_REG
register selects the appropriate signal.
Features
1K
RB3
The PIC16F887 does not have any special pins for programming (the
process of writing a program to ROM). Port pins, normally available as
general-purpose I/O pins, are used for this purpose. To be more precise,
it is about port B pins used for clock (RB6) and data transfer (RB7) during
program loading.
MCU
PIC16F887: porturile C si D
PORTC
TRISC
PORTD
TRISD
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
TRISD7
TRISD6
TRISD5
TRISD4
TRISD3
TRISD2
TRISD1
TRISD0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Legend
R/W
(x)
(1)
Bit is unimplemented
Readable/Writable bit
After reset, bit is unknown
After reset, bit is set
Features
Bit name
Features
Bit name
Features
Bit name
Features
Bit name
PIC16F887: portul E
PORTE
TRISE
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
R/W (x)
RE7
RE6
RE5
RE4
RE3
RE2
RE1
RE0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
TRISE7
TRISE6
TRISE5
TRISE4
TRISE3
TRISE2
TRISE1
TRISE0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port A is an 8-bit wide, bidirectional port. Bits of the TRISE and ANSEL
registers control the Port E pins. All Port E pins act as digital inputs/outputs,
except the RE3 pin which is always configured as an input. Three pins can
also be analog inputs (denoted by AN):
Features
Bit name
Features
Bit name
Legend
R/W
(x)
(1)
Readable/Writable bit
After reset, bit is unknown
After reset, bit is set
ANSEL
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
R/W (1)
Features
ANS7
ANS6
ANS5
ANS4
ANS3
ANS2
ANS1
ANS0
Bit name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The ANSEL register are used to configure the input mode of an I/O pin to analog or digital.
To configure a pin as an analog input, the appropriate bit of the ANSEL register must be set (1). To configure a pin as a digital input/output,
the appropriate bit must be cleared (0).
The state of the ANSEL bits has no influence on digital output functions. The result of any attempt to read a port pin configured as an analog
input will be 0.
MCLR
void main() {
11
VDD
32
VDD
5 VDC
ANSEL = 0x00;
ANSELH = 0x00;
TRISB = 0x00;
RBPU = 0x00;
WPUB1 = 1;
// Pull-up resistor is
// connected to the PORTB.1
K7 ... K0
RB7
RB6
RB5
PIC 16F877
RB4
13
20 MHz
RB2
RB1
RB0
39
38
37
36
35
34
33
void main() {
14
33 pF
OSC1
RB3
40
OSC2
10K
ANSEL = 0x00;
ANSELH = 0x00;
33 pF
TRISB = 0b00001111; // Set pins 0-3 as inputs
// and pins 4-7 as outputs
12
VSS
31
VSS
MCLR
void main() {
11
VDD
32
VDD
8 x 330R
RB7
RB6
RB5
PIC 16F877
RB4
13
20 MHz
14
33 pF
OSC1
OSC2
33 pF
12
VSS
31
VSS
RB3
RB2
RB1
RB0
8 x LED
40
ANSEL = 0x00;
ANSELH = 0x00;
TRISB = 0x00;
PORTB = 0x00;
// Clear port B
do {
PORTB = ~PORTB;
// Invert values
39
38
37
36
35
Delay_ms(1000);
// 1 second delay
34
} while(1);
33
// Endless loop
MCLR
4x4 Keypad
11
VDD
32
VDD
RB7
RB6
PIC 16F877
RB5
13
20 MHz
39
38
37
RB3
36
35
OSC2
34
33 pF
RB0
33
4 x 2K2
12
VSS
31
VSS
OSC1
RB1
33 pF
A
RB4
RB2
14
40
5 VDC
10K
CA
RESET
MCLR
11
VDD
32
VDD
8 x 330R
RB7
RB6
RB5
PIC 16F877
RB4
13
20 MHz
14
33 pF
OSC1
OSC2
33 pF
12
VSS
31
VSS
RB3
RB2
RB1
RB0
40
dp
39
38
37
36
35
34
33
A
F
B
G
C
D
DP
MCLR
11
VDD
32
VDD
8 x 330R
RB7
RB6
RB5
PIC 16F877
RB4
13
20 MHz
14
33 pF
OSC1
RB3
RB2
RB1
RB0
40
dp
39
38
37
36
35
34
33
A
F
C
D
OSC2
33 pF
12
VSS
31
VSS
B
G
CC
DP
MCLR
11
VDD
32
VDD
8 x 330R
RB7
RB6
RB5
PIC 16F877
RB4
13
20 MHz
14
OSC1
RB3
RB2
RB1
RB0
40
dp
39
38
37
36
35
34
33
OSC2
4 x 10K
33 pF
33 pF
RC3
RC2
RC1
12
VSS
31
VSS
RC0
18
17
16
15
CC
CC
4 x BC107
CC
CC
MCLR
11
VDD
32
VDD
5 VDC
8 x 10K
RB7
40
PIC 16F877
8 x BC107
13
20 MHz
14
OSC1
5 VDC
RB0
33
OSC2
4 x 10K
33 pF
33 pF
RC3
RC2
RC1
12
VSS
31
VSS
RC0
18
17
16
15
CC
CC
4 x BC107
CC
CC
MCLR
11
VDD
32
VDD
5 VDC
8 x 10K
RB7
40
PIC 16F877
8 x BC107
13
20 MHz
OSC1
5 VDC
RB0
33
5 VDC
14
OSC2
VCC
RC2
RC1
12
VSS
31
VSS
8 x 10K
Y0
33 pF
RC0
17
16
15
C
B
74138
33 pF
A
Y7
G1
CC
CC
G2
8 x BC107
void main() {
ANSEL = 0x00;
ANSELH = 0x00;
ANSEL = 0x00;
ANSELH = 0x00;
TRISB = 0x00;
TRISC = 0x00;
TRISB = 0x00;
TRISC = 0x00;
do {
PORTC = 0x01;
PORTB = 0x6D;
Delay_ms(100);
PORTC = 0x02;
PORTB = 0x06;
Delay_ms(100);
PORTC = 0x04;
PORTB = 0x5B;
Delay_ms(100);
0 b DP_G_F_E_D_C_B_A
} while(1);
}
A
F
A
B
G
E
G
C
A
B
E
DP
C
D
B
G
E
DP
0b00000110 = 0x06 = 6
C
D
DP
0b01011011 = 0x5B = 91
MCLR
11
VDD
32
VDD
PIC 16F877
1N4001
VCC
13
20 MHz
14
OSC1
Relay
2K2
RB0
33
BC337/338
OSC2
void main() {
33 pF
33 pF
12
VSS
31
VSS
ANSEL = 0x00;
ANSELH = 0x00;
TRISB = 0x00;
RB0_bit = 1;
// Set RB0
MCLR
void main() {
11
VDD
32
VDD
PIC 16F877
20 MHz
14
33 pF
OSC1
VCC
2K2
RB0
33
BC327/328
OSC2
33 pF
12
VSS
31
VSS
1N4001
13
Relay
ANSEL = 0x00;
ANSELH = 0x00;
TRISB = 0x00;
RB0_bit = 0;
// Clear RB0
D7
D6
D5
D2
D3
D4
D1
D0
RS
VEE
R/W
VSS
VDD
Function
Pin
Name
Logic State
Ground
Vss
0V
Power supply
Vdd
+5V
Contrast
Control
of
Vee
RS
R/W
operating
6
Data/
commands
Backlight
Description
0 - Vdd
D0-D7 as cmd.
D0-D7 as data
Write data
Read data
Access disabled
Normal operating
From 1 to 0
Transfer to LCD
Bit 0 LSB
D0
0/1
D1
0/1
Bit 1
D2
0/1
Bit 2
10
D3
0/1
Bit 3
11
D4
0/1
Bit 4
Bit 5
12
D5
0/1
13
D6
0/1
Bit 6
14
D7
0/1
Bit 7 MSB
15
0 - Vdd
16
0V
RS
RW
D7
D6
D5
D4
D3
D2
D1
D0
Exec. time
Clear display
1.64ms
Cursor home
1.64ms
I/D
40us
40us
Cursor/Display shift
D/C
R/L
40us
Function set
DL
40us
DDRAM address
BF
DDRAM address
D7
D6
D5
D4
D3
D2
D1
D0
40us
D7
D6
D5
D4
D3
D2
D1
D0
40us
CGRAM address
40us
40us
-
S:
1 = Display shift on
0 = Display shift off
D:
1 = Display on
0 = Display off
N:
U:
1 = Cursor on
0 = Cursor off
F:
B:
1 = Cursor blink on
0 = Cursor blink off
DDRAM Memory
First Line Addresses: 00 - 27 hex.
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27
LCD Display
xxxx0000
CG
RAM
(1)
xxxx0001
(2)
xxxx0010
(3)
xxxx0011
(4)
xxxx0100
(5)
xxxx0101
(6)
xxxx0110
(7)
xxxx0111
(8)
xxxx1000
(1)
xxxx1001
(2)
xxxx1010
(3)
xxxx1011
(4)
xxxx1100
(5)
xxxx1101
(6)
xxxx1110
(7)
xxxx1111
(8)
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0
0
0
1
1
1
0
0
0
0
1
0
0
0
1
0
1
0
1
0
0
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
38
39
3A
3B
3C
3D
3E
3F
0
1
0
0
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
1
1
0
0
1
0
1
0
1
0
1
0
0
1
0
0
1
0
0
1
LCD Display
MCLR
DATA LINES
11
VDD
32
VDD
CONTROL LINES
5 VDC
14
33 pF
34
OSC2
33 pF
12
VSS
31
VSS
D7
D6
D5
D2
D3
D4
D1
D0
33
RS
RB0
5K
35
VEE
RB1
36
VSS
20 MHz
OSC1
RB2
37
R/W
13
RB3
38
VDD
PIC 16F877
RB4
CONTRAST
RB5
0 0 0
Uni/Bipolar Non-Return-to-Zero
(e.g.: RS-232)
0 0 0
Non-Return-to-Zero Space
(e.g.: USB)
0 0 0
Idle State
STOP bit
START bit
H
L
8- or 9-bit data
Non-Return-to-Zero Inverted
(e.g.: USB)
START bit
EUSART
EUSART 1
ADDEN=1
EUSART 2
ADDEN=1
EUSART 3
9-bit address
ADDEN=1
EUSART
EUSART 1
8-bit data
ADDEN=0
EUSART 2
ADDEN=1
EUSART 3
TXIE
Interrupt
TXIF
TXREG
MSB
LSB
Pin
Control
RC6/TX pin
Register TSR
TXEN
SPEN
Fosc
TX9
1/n
n
TX9D
SPBRGH
BRG16
x4
+1
SPBRG
x16
x64
SYNC
1 x
0 0
BRGH
1 0
BRG16
1 0
TRMT
TXEN = 1 - EUSART transmitter is enabled by setting the TXEN bit of the TXSTA register.
SYNC = 0 - EUSART is configured to operate in asynchronous mode by clearing the SYNC bit of the TXSTA register.
SPEN = 1 - By setting the SPEN bit of the RCSTA register, EUSART is enabled and the TX/CK pin is automatically configured as an output. If this bit is simultaneously
used for some analogue function, it must be disabled by clearing the corresponding bit of the ANSEL register.
SPEN
CREN
OERR
RCIDL
RSR Register
RC7/RX pin
MSB
Pin
Control
Fosc
7-0
LSB
STOP
Synchronization
START
RX9
1/n
n
SPBRGH
BRG16
+1
SPBRG
x4
x16
x64
SYNC
1 x
0 0
BRGH
1 0
BRG16
1 0
RCREG Register
RX9D
FIFO
RCIF
x x x x x x x x
RCIE
CPU
Interrupt
CREN = 1 - EUSART receiver is enabled by setting the CREN bit of the RCSTA register;
SYNC = 0 - EUSART is configured to operate in asynchronous mode by clearing the SYNC bit stored in the TXSTA register;
SPEN = 1 - By setting the SPEN bit of the RCSTA register, EUSART is enabled and the RX/DT pin is automatically configured as an input. If this bit is simultaneously
used for some analogue function, it must be disabled by clearing the corresponding bit of the ANSEL register.
TXSTA
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R (0)
R (1)
R/W (1)
Features
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
Bit name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CSRC - Clock Source Select bit - determines clock source. It is used only
in synchronous mode.
1 - Master mode. Clock is generated internally from Baud Rate Generator.
0 - Slave mode. Clock is generated from external source.
Legend
R/W
R
(0)
(1)
Readable/Writable bit
Readable bit
After reset, bit is cleared
After reset, bit is set
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R (0)
R (0)
R (x)
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Features
Bit name
Legend
R/W
R
(0)
(x)
Readable/Writable bit
Readable bit
After reset, bit is cleared
After reset, bit is unknown
MCLR
9
5
11
VDD
32
VDD
10 uF
13
20 MHz
14
10 uF
OSC1
C1+
V+
GND
C1-
T1OUT
C2+
C2V-
OSC2
T2OUT
R2N
33 pF
33 pF
12
VSS
31
VSS
10 uF
26
RX
25
TX
5 VDC
VCC
MAX 232
PIC 16F877
10 uF
R1IN
R1OUT
T1IN
T2IN
R2OUT
100 nF
SPI
Processor 1
Master
Processor 2
1
Master
Slave
I2C
Processor 1
Master
Processor 2
1
Master
Slave
SS=0
Slave
SPI
SS=1
Slave
SPI
Slave
SPI
SCK
SDI
SDO
SS=1
SCK
SDI
SDO
SCK
SDI
SDO
Master
SPI
SCK
SDI
SDO
SSPBUF
SDO
SSPSR
SCK
SCK
SDI
SDO
SSPBUF
SSPSR
SCK
SDI
PIC16F887: comunicatia I2 C
Address 2
Master
(MCU)
SDA
SCL
C
EEPROM
Slave
Address 1
Slave
Address 2
Slave
Address 3
PIC16F887: comunicatia I2 C
Start - Address - Acknowledge - Data - Acknowledge ... Data - Acknowledge - Stop!
SCL
SDA
SCL
6 5 4 3 2 10
BYTE 1
ADDRESS
Acknowledge
Data Bit (1)
BYTE n-1
Acknowledge
Data Bit (1)
R/W 0 = WRITE
BYTE 1
SDA
DATA n
1 = READ
ADDRESS
7 6 5 4 3 2 10
BYTE 2
BYTE 3
BYTE n-1
Once the first byte has been sent (only 8-bit data are transmitted), master goes into receive mode and waits
for acknowledgment from the receive device that address match has occurred. If the slave device sends
acknowledge data bit (1), data transfer will be continued until the master device (MCU) sends the Stop bit.
64us
128us
192us
1-wire output
256us
320us
384us
448us
512us
576us
640us
reset
device response
1-wire input
input sample time
To send a "1", the bus master software sends a very brief (1-15 s) low pulse.
To send a "0", the software sends a 60 s low pulse.
1.024ms
960us
1-wire output
LSB, 1
1.088ms
1.152ms
1.216ms
1.280ms
1.344ms
1.408ms
1.472ms
MSB, 0
1-wire input
input sample time
1.600ms
1.664ms
1.728ms
1.792ms
1.856ms
1.920ms
1.984ms
2,048ms
1-wire output
1-wire input
The falling (negative) edge of the pulse is used to start a monostable multivibrator in the slave device.
The multivibrator in the slave clocks to read the data line about 30 s after the falling edge. Due to timing accuracy,
which is why the output pulses have to be 60 s long, and the starting pulse can't be longer than 15 s.
MCLR
11
VDD
32
VDD
PIC 16F877
5 VDC
13
20 MHz
14
33 pF
Slave 1
OSC1
OSC2
33 pF
12
VSS
31
VSS
18
SCL
23
SDA
Addr #2
Addr #3
10K
10K
Addr #1
SCL
SDA
Slave 2
SCL
SDA
Slave 3
SCL
SDA
PIC16F887: comunicatia I2 C
5 VDC
10K
RESET
MCLR
11
VDD
32
VDD
RB2
RB1
34
33
PIC 16F877
RB0
35
13
20 MHz
14
33 pF
SS
Slave 1
OSC1
OSC2
33 pF
12
VSS
31
VSS
24
SDO
23
SDI
SCK
18
SDI
SDO
SCK
SS
Slave 2
SDI
SDO
SCK
SS
Slave 3
SDI
SDO
SCK
SRF10 Commands
10K
RESET
MCLR
11
VDD
32
VDD
Decimal
Hex
80
0x50
81
0x51
Action
82
0x52
160
0xA0
165
0xA5
170
0xAA
5 VDC
PIC 16F877
13
20 MHz
14
33 pF
SRF10
OSC1
OSC2
33 pF
12
VSS
31
VSS
void main() {
10K
10K
+5V
18
SCL
23
SDA
SCL
SDA
GND
Address:
0xE0
ANSEL = 0x00;
ANSELH = 0x00;
I2C1_Init(100000);
I2C1_Start();
I2C1_Wr(0xE0);
I2C1_Wr(0x52);
Delay_100ms();
Range = I2C1_Read(0);
I2C1_Stop();
//
//
//
//
// Read data
// Issue I2C stop
MCLR
11
VDD
32
VDD
5 VDC
PIC 16F877
5 VDC
13
20 MHz
Addr #1
33 pF
OSC2
33 pF
12
VSS
31
VSS
Addr #3
VDD
10K
VDD
Slave 1
OSC1
RB0
14
Addr #2
VDD
33
Slave 2
D
GND
Slave 3
D
GND
GND
1: Clock
2: GND
3: Data
4: N/C
5: +5V
6: N/C
2
6
2
435
PS/2 Connector
1: Clock
2: Data
3: N/C
4: GND
5: +5V
Keyboard to Host
Idle
Clock
Keyboard/Mouse
Idle
Data
Host
Start
0 1
2 3 4 5 6 7 P
Stop
Host to Keyboard
Idle
Clock
Keyboard/Mouse
Idle
Data
Host
0 1
2 3 4 5 6 7 P
ACK
MCLR
11
VDD
32
VDD
PIC 16F877
5 VDC
13
20 MHz
14
33 pF
OSC1
OSC2
33 pF
33
RB0
34
RB1
RB2
RB3
12
VSS
31
VSS
35
36
10K
10K
+5V
PS/2
Device
Data
Clock
GND
Pins
AVdd
CVref
Vref
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
AVss
0
1
VCFG0
VCFG1
ADFM
ADC
GO/DONE
ADON
ADRESH
GND
CHS3
CHS2
CHS1
Justified
CHS0
ADCON1 Register
ADRESL
ADCON0
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
R/W (0)
ADCS1
ADCS0
CHS3
CHS2
CHS1
CHS0
GO/DONE
ADON
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Legend
R/W
(0)
Readable/Writable bit
After reset, bit is cleared
ADSC1 ADCS0
0
Clock
Fosc/2
Fosc/8
Fosc/32
RC
Features
Bit name
CHS3
CHS2
CHS1
CHS0
Channel
Pin
RA0/AN0
RA1/AN1
RA2/AN2
RA3/AN3
RA4/AN4
RE0/AN5
RE1/AN6
RE2/AN7
RB2/AN8
RB3/AN9
10
RB1/AN10
11
RB4/AN11
12
RB0/AN12
13
CVref
Vref = 0.6V
RB5/AN13
ADCON1
R/W (0)
R/W (0)
ADFM
VCFG1
VCFG0
Features
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Legend
R/W
(0)
Bit is unimplemented
Readable/Writable bit
After reset, bit is cleared
ADRESL
VCC + 0.3V
000000
7
Bit name
VCC (+5V)
Right justified
1
VREF +
VREF + 2V
4
3
VCC - 2.5V
ADRESH
ADRESL
2
VREF+ -2V
000000
7
Left justified
Analog Input
Voltage Vin
Vin
GND (0V)
GND - 0.3V
VCFG1 - Voltage Reference bit selects negative voltage reference source needed for the operation of A/D converter.
1 - Negative voltage reference is applied to the Vref- pin.
0 - Power supply voltage VSS is used as negative voltage reference source.
VCFG0 - Voltage Reference bit selects positive voltage reference source needed for the operation of A/D converter.
1 - Positive voltage reference is applied to the Vref+ pin.
0 - Power supply voltage VDD is used as positive voltage reference source.
MCLR
4
AN2
5
VREF+
PIC 16F877
11
VDD
32
VDD
13
20 MHz
14
33 pF
OSC1
OSC2
33 pF
12
VSS
31
VSS
5 VDC
5 VDC
5 VDC
10K
RESET
R1
MCLR
11
VDD
32
VDD
4
AN2
5
VREF+
5 VDC
PIC 16F877
R2
13
20 MHz
14
33 pF
OSC1
OSC2
33 pF
12
VSS
31
VSS
R2
R1
600
10K
5 VDC
RESET
MCLR
11
VDD
32
VDD
4
AN2
5
VREF+
5 VDC
500
400
300
200
100
0
0
10
20
30
40
50
60
70
80
90
100
Range (cm)
PIC 16F877
Sharp GP2D12
13
20 MHz
14
33 pF
OSC1
Range =
4187.8
( IRValue
)
1.106
OSC2
ANSEL = 0x04;
ANSELH = 0x00;
33 pF
12
VSS
31
VSS
TRISA = 0xFF;
// Port A as input
IRValue = ADC_Read(2);
Range = (6787/(IRValue-3))-4;
Range = pow(4187.8/IRValue,1.106);
}
A+
A-
B+
D-
B+
B-
Red
Red
Red
R/W
Black
Yellow
O/W
Orange
B/W
Black
G/W
White
Y/W
Green
Orange
R/W
Black
Yellow
C+
A-
D+
C+
Single Phase
A+
B+
AB-
Dual Phase
A+
B+
AB-
High torque
Good step accuracy
Half Phase
A+
B+
AB-
MCLR
11
VDD
32
VDD
Darlingtons
RB1
RB2
PIC 16F877
RB3
13
20 MHz
14
33 pF
OSC1
OSC2
33 pF
12
VSS
31
VSS
33
34
35
36
1B
1C
2B
2C
3B
3C
4B
5B
6B
7B
GND
ULN2003A
RB0
A+
AB+
4C
5C
6C
7C
COM
VCC
B-
MCLR
11
VDD
32
VDD
Darlingtons
RB1
RB2
PIC 16F877
RB3
13
20 MHz
14
33 pF
OSC1
OSC2
33 pF
12
VSS
31
VSS
33
34
35
36
1B
1C
2B
2C
3B
3C
4B
5B
6B
7B
GND
ULN2003A
RB0
A+
AB+
4C
5C
6C
7C
COM
VCC
B-
PIC16F887: puntea H
Puntea H cu comutatoare
VSS
Q3
Q1
S1
DC Motor
S3
Q1
Q3
DC Motor
D1
D2
Q2
S2
S4
Q2
S2
S3
S4
Result
1
0
0
1
0
0
1
0
0
1
0
1
0
1
0
1
0
0
0
1
D4
Q4
Q4
VSS
S1
D3
DC Motor
S1
DC Motor
VSS
S3
S1
S2
DC Motor
S3
S4
S2
S4
PIC16F887: puntea H
VSS
VSS
D1
DC Motor
D2
D1
DC Motor
D2
D4
D3
D4
D
D3
D
Result
Result
1
0
0
1
0
0
1
0
0
1
0
1
0
1
0
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
0
0
0
0
1
1
0
0
1
0
0
1
0
1
5 VDC
K=
V average
t
Pulse width
Period
V average = K VDC
5 VDC
V average
t
0
5 VDC
V average
t
0
Pulse width
Period
V motor = K VSS
(duty cycle)
MCLR
11
VDD
32
VDD
PIC 16F877
RD5
13
20 MHz
14
RB1
17
DC Motor
IN2
34
EN1
OUT1
OUT2
VSS
GND
OSC1
VS
OSC2
VSS
IN1
28
L293D
RC2
33 pF
12
VSS
31
VSS
1
1
1
1
0
0
1
1
0
X
1
0
1
0
X
Result
Motor moves forward
Motor moves reverse
Motor brakes
Motor brakes
Motor free runs
MCLR
11
VDD
32
VDD
5 VDC
H-bridge
PIC 16F877
RD5
13
20 MHz
14
RB1
17
DC Motor
In2
34
EnA
OUT1
OUT2
VSS
GND
OSC1
VS
OSC2
EnA In1
33 pF
VSS
In1
28
L298N
RC2
33 pF
12
VSS
31
VSS
1
1
1
1
0
0
1
1
0
X
In2
1
0
1
0
X
Result
Motor moves forward
Motor moves reverse
Motor brakes
Motor brakes
Motor free runs
A. Absolute digital shaft encoders produce a unique digital code for each
distinct angle of the shaft.
3-bit binary code encoder
Clockwise rotation
Counter-clockwise rotation
Phase
Phase
A
B
Index
A
B
Phase
1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4
5V
-60 .. 60
20 ms
-60
ti =1,5 ms
ti =2,1 ms
60
DC MOTOR
Gearbox
ti =0,9 ms
Output
Position
Sensor
Error Amp
Control Pulse
Limbaje de programare
Limbaj cod masin
a: instructiunile sub form
a binar
a care sunt executate de c
atre
microcontroller, organizate sub forma a 12, 14 sau 16 biti, n functie de arhitectura
MCU. Ca fisier, poate fi reprezentat sub form
a hexazecimal
a (*.hex).
PC
Bin
Program
memory
CPU
0 10 10 0 10 10 0 1 1 1
10 0 1 1 10 10 1 10 1 1
10 10 1 10 0 10 1 10 0
0 10 1 10 10 0 10 10 1
0 0 10 0 0 10 10 10 1 1
10 0 10 0 1 10 10 0 10
0 0 0 1 1 10 10 1 10 1 1
10 10 1 10 0 10 1 10 0
0 0 10 0 1 10 10 0 10 1
Program execution
10101010101010101
110100011101011000
1011011101101010
10100101010111100
101011100101011111
001010101101010001
00010101010101011
011101100101101111
10101011010100101
0FA0012316
0101010110100010
Hex
34BC212113
01BA6F4A21
123A1BAD5
Limbaje de programare
Limbaj de asamblare: instructiunile sunt scrise sub forma unor abrevieri, fiind
apropiate de limbajul cod masin
a (*.asm).
Pentru a fi transformate, este necesar un compilator.
Programming
microcontroller
Program
memory
CPU
0 10 10 0 10 10 0 1 1 1
10 0 1 1 10 10 1 10 1 1
10 10 1 10 0 10 1 10 0
0 10 1 10 10 0 10 10 1
0 0 10 0 0 10 10 10 1 1
10 0 10 0 1 10 10 0 10
0 0 0 1 1 10 10 1 10 1 1
10 10 1 10 0 10 1 10 0
0 0 10 0 1 10 10 0 10 1
Program execution
PC
Program
compilation
Bin
10101010101010101
110100011101011000
1011011101101010
10100101010111100
101011100101011111
001010101101010001
00010101010101011
011101100101101111
10101011010100101
0FA0012316
0101010110100010
Hex
34BC212113
01BA6F4A21
123A1BAD5
Assembly
language
Increment
incf
movf
movwf
goto
cnt, f
cnt, w
PORTB
Loop
Decrement
decf
movf
movwf
goto
cnt, f
cnt, w
PORTB
Loop
Limbaje de programare
Cod C: instructiunile sunt exprimate sub forma unui limbaj apropiat de limbajul uman
(limbaj de programare de nivel nalt) (*.c).
Transformarea se face cu ajutorul unui compilator care, spre deosebire de compilatorul
de cod assembler, nu ofer
a ntotdeauna codul optim (cel mai scurt).
Programming
microcontroller
Program
memory
CPU
0 10 10 0 10 10 0 1 1 1
10 0 1 1 10 10 1 10 1 1
10 10 1 10 0 10 1 10 0
0 10 1 10 10 0 10 10 1
0 0 10 0 0 10 10 10 1 1
10 0 10 0 1 10 10 0 10
0 0 0 1 1 10 10 1 10 1 1
10 10 1 10 0 10 1 10 0
0 0 10 0 1 10 10 0 10 1
Bin
10101010101010101
110100011101011000
1011011101101010
10100101010111100
101011100101011111
001010101101010001
00010101010101011
011101100101101111
10101011010100101
0FA0012316
0101010110100010
C programming language
void main() {
USAR_Init(19200);
Hex
ANSEL = 0x04;
TRISA = 0xFF;
ANSELH = 0;
34BC212113
01BA6F4A21
123A1BAD5
// Initialize USART
// Configure AN2 pin as
// Configure AN pin as
do {
temp_res = ADC_Read(2) >> 2;
USART_Write(temp_res);
Delay_ms(1000);
} while(1);
// Endless loop
Program execution
PC
Program
compilation
p=16f887
<p16f887.inc>
; Type of microcontroller
; Defines all SFRs
; and bits within the PIC16F887
;***************************************************************************
PROGRAM
cblock
var1
var2
var3
endc
0x20
;
;
;
;
Block of
Variable
Variable
Variable
variables
var1 at
var2 at
var3 at
;***************************************************************************
0x0000
main
0x0004
; Start of program
; Instructions
; End of program
;***************************************************************************
PROGRAM
; Instructions
; Instructions
;***************************************************************************
Program written in C
; ADDRESS
OPCODE
ASM
; -------------------------------------------$0000
$2804
GOTO
_main
$0004
$
_main:
;Test.c,1 :: void main() {
;Test.c,3 :: TRISB = 0;
// All port B pins
$0004
$1303
BCF
STATUS, RP1
$0005
$1683
BSF
STATUS, RP0
$0006
$0186
CLRF
TRISB, 1
;Test.c,4 :: TRISB = 0b01010101; // Logic state
$0007
$3005
MOVLW 85
$0008
$1283
BCF
STATUS, RP0
$0009
$0086
MOVWF PORTB
;Test.c,5 :: }
$000A
$280A
GOTO
$
:100000000428FF3FFF3FFF3F03138316860155304F
:10001000831286000A28FF3FFF3FFF3FFF3FFF3F5D
:04400E00F22FFFFF8F
:00000001FF
Tipuri de date
Tipuri de date f
ar
a prefix
Tip de date
Descriere
Num
ar de biti
Interval de valori
char
int
float
Character
Integer
Floating point
8
16
32
double
Double precision
floating point
32
0 .. 255
-32768 .. 32767
1.17549435082 1038 ..
.. 6.80564774407 1038
1.17549435082 1038 ..
.. 6.80564774407 1038
Num
ar de biti
Interval de valori
char
int
signed char
unsigned int
short int
signed short int
long int
signed long int
8
16
8
8
32
32
-128 .. 127
0 .. 65535
0 .. 255
-128 .. 127
0 .. 4294967295
-2147483648 .. 2147483647
Low priority
High priority
Data Types