Facultatea Microelectronica si Ingineria Biomedicala
Raport
Despre Realizarea stagiului de practica tehnologica pentru studentii studiilor superioare de masterat la specialitatea Microelectronica si nanotehnologii ciclu II.
Tema: Schema de control ecran RGB led-uri
A efectuat : st.gr.MN-111, Dreglea Ion
Conducator de practica: prof.univ.dr.hab., S. Raileanu
Chisinau 2014 CUPRINS
Introducere
CAPITOLUL 1 1.1 Notiuni generale 1.2 Securitatea la locul de practica .
CAPITOLUL 3 3.1 Calculul DCDC-convertor ... 3.2 Schema de putere 3.3 Schema de control ...
Concluzie
Bibliografie Introducere
Practica in productie reprezinta o parte organica a procesului de invatamint si serveste scopurilor de fundamentare si aprofundare a cunostintelor teoretice, dobandirii abilitatilor practice de lucru in organizatii de stat, publice sau private. La practica de productie se admit studentii care au indeplinit integral programul teoretic de studii. Un sistem ncorporat este un sistem de computer cu o funcie specific n cadrul unui sistem mecanic sau electric mai mare, adesea cu constrngeri de calcul n timp real.este ncorporat ca parte a unui dispozitiv complet, inclusiv multe ori hardware i mecanice. Prin contrast, un calculator de uz general, cum ar fi un calculator personal (PC), este conceput pentru a fi flexibil i pentru a satisface o gam larg de nevoi ale utilizatorilor finali. Sistemele integrate de control mai multe dispozitive n uz comun astzi. Sistemele moderne integrate sunt adesea bazate pe microcontrolere (de exemplu, procesoare cu memorie integrat sau interfee periferice), dar microprocesoare obinuite (folosind chips-uri externe pentru memorie i circuite de interfa periferice) sunt, de asemenea, nc frecvente, n special n sisteme mai complexe. n ambele cazuri, procesorul utilizat (e) pot fi tipuri, de la scop mai degrab general a foarte specializat n anumit clas de calcule, sau chiar personalizat proiectat pentru aplicarea la ndemn. O clas standard comun de procesoare dedicate este procesorul de semnal digital (DSP).
CAPITOLUL 1
1.1 Notiuni generale
Convertoarele DC/DC sunt surse n comutaie care au trei mari avantaje fa de sursele liniare: (1) eficien mult mai mare dect sursele liniare (tipic 75-90%); (2) pierdere mic de energie prin transfer, componentele fiind astfel mai mici i necesitnd un management termic simplu; (3) energia nmagazinat de o bobin ntr-un regulator de comutare poate fi transferat la ieire cu o tensiune mai mare dect cea de intrare (boost), chiar negativ (invert) sau poate, prin intermediul unui transformator, s ofere izolare galvanic fa de intrare (min.1000Vdc), ceea ce nu poate realiza o surs liniar. Principiul de baz al unui convertor DC/DC este comandarea unui element de comutaie la nalt frecven (min.100kHz), controlnd raportul on-time/ off-time (duty ratio) ntr-o manier variabil pentru a menine tensiunea de ieire la un anumit nivel. De obicei, tensiunea este controlat la un nivel constant prin intermediul feedback-ului negativ al tensiunii de ieire. Sursele n comutaie au rezolvat problema zgomotului electric generat prin comutaie, avnd controlere realizate n circuite integrate. NOT: Aproximativ 80% din problemele legate de EMC - Electromagnetic compatibility = funcionare fr a interfera cu alte dispozitive - sunt datorate cablurilor de alimentare i cablurilor I/O care creaz o structur de antene neintenionate ce pot radia energia electromagnetic generat de componente electronice din interiorul unui produs i pot primi energia electromagnetic din exteriorul produsului. EMC este legat de EMI - Electromagnetic interference = cantitatea de energie emanat, intenionat sau nu, de echipamente electronice care provoac degradare de performane la echipamente din apropiere i EMS - Electromagnetic susceptibility = lipsa de imunitate la interferene interne sau externe. Emisiile de perturbaii radiate sau conduse (n reeaua AC) neintenionat de ctre echipamente IT sunt reglementate de standardul EN 55022.
PSD-45B-24, 45W, intrare 18...36Vdc, ieire 24Vdc, 1.875A, izolaie I/O 1500Vac, eficien 85% Standardele EN 55024 i EN 61000-4-2, 3, 4, 5, 6, 8 reglementeaz imunitatea la: ESD - descrcri electrostatice, RF emisii radio intenionate, la zgomote de comutare sau tranziii electrice, la fulgere, la cmpuri magnetice variabile cu 50-60Hz i la fluctuaii de putere n reeaua AC. 2. Convertoarele DC/DC cobortoare de tensiune sunt numite step-down sau buck. Un exemplu tipic ar fi un convertor de 24Vdc la 12Vdc, cu o gam de tensiune de intrare 20...30Vdc (DC BUS sau o baterie de 24Vdc), care d la ieire tensiune de 13,8Vdc, tipic de float pentru o baterie de 12Vdc i reprezentnd tensiunea acceptabil pentru un dispozitiv de 12Vdc. 3. Convertoarele DC/DC care ridic tensiunea sunt numite step-up sau boost. Un exemplu tipic ar fi un convertor de 12Vdc la 24Vdc, avnd o gam de tensiune de intrare 11...15Vdc i o ieire de 24Vdc. Astfel de aplicaii sunt n sistemele unde exist o surs principal de 12Vdc i consumatori alimentai la 24Vdc.
1.2 Securitatea la locul de practica
Informarea i instruirea lucrtorilor 1.) Angajatorul va asigura informarea lucrtorilor asupra tuturor aspectelor de securitate i sntate n munc derivate din cerinele desfurrii activitilor, precum i asupra msurilor aplicabile la locul de munc. 2.) Lucrtorii vor fi instruii n utilizarea echipamentelor de calcul si a mobilierului specific de birou nainte de nceperea activitii i ori de cte ori se modific organizarea sau dotarea locurilor de munc. 3.) Lucrtorii vor fi instruii special asupra necesitii amenajrii ergonomice a locului de munc i asupra poziiilor / micrilor / deplasrilor corecte pe care trebuie s le adopte n timpul lucrului. Organizarea activitii 4.) Angajatorul va planifica i organiza activitile de prelucrare automat a datelor astfel nct activitatea zilnic n faa ecranului s alterneze cu alte activiti. 5.) n cazul n care alternarea activitilor nu este posibil, iar sarcina de munc impune utilizarea ecranelor n cea mai mare parte a timpului de lucru, se vor acorda pauze suplimentare fa de cele obinuite 1) n cazul lucrului continuu n faa ecranului, trebuie prevzute pauze corespunztoare i alternarea activitilor. 2) Durata real a lucrului n faa ecranului ,trebuie s fie mai mic de 6 ore pe zi. 3) Sarcinile lucrtorilor trebuie diversificate. 4) Lucrtorii trebuie s decid ordinea n care i execut sarcinile. 5) Lucrtorii nu trebuie s simt o presiune excesiv n ndeplinirea sarcinilor de lucru sau n realizarea termenelor finale 6) Angajatorul asigur informarea, instruirea i consultarea corespunztoare nainte de nfiinarea, meninerea sau mbuntirea locurilor de munc care implic utilizarea computerelor. Exploatarea echipamentelor de calcul 6.) Se interzice lucrtorilor s utilizeze echipamentele de calcul pe care nu le cunosc i pentru care nu au instruirea necesar. 7.) Punerea sub tensiune a tablourilor de distribuie va fi efectuat numai de ctre personalul autorizat n acest scop. Se interzice personalului de deservire a echipamentelor de calcul s intervin la tablouri electrice, prize, techere, cordoane de alimentare, grupuri stabilizatoare, instalaii de climatizare sau la orice alte instalaii auxiliare specifice. 8.) La punerea sub tensiune a calculatoarelor electronice se vor respecta, n ordine, urmtoarele prevederi: 1) verificarea temperaturii i umiditii din sal; 2) verificarea tensiunii la tabloul de alimentare; 3) punerea sub tensiune a unitii centrale, prin acionarea butonului corespunztor de pe panoul unitii centrale; 4) punerea sub tensiune a echipamentelor periferice prin acionarea butoanelor corespunztoare de pe panourile de comand, n succesiunea indicat n documentaia tehnic a calculatorului. 9.) Scoaterea de sub tensiune a calculatoarelor electronice se va realiza n succesiunea invers celei prevzute la punerea sub tensiune. 10.) Punerea n funciune a unui echipament dup revizii sau reparaii se va face numai dup ce personalul autorizat s efectueze revizia sau reparaia confirm n scris c echipamentul respectiv este n bun stare de funcionare. 11.) Se interzice ndeprtarea dispozitivelor de protecie ale echipamentelor de calcul. 12.) Se interzice efectuarea oricrei intervenii n timpul funcionrii echipamentului de calcul. 13.) Funcionarea echipamentelor de calcul va fi permanent supravegheat pentru a se putea interveni imediat ce se produce o defeciune. Se interzice continuarea lucrului la echipamentul de calcul atunci cnd se constat o defeciune a acestuia. Remedierea defeciunilor se va realiza numai de ctre personalul de ntreinere autorizat. 14.) Dac n timpul funcionrii echipamentului de calcul se aud zgomote deosebite, acesta va fi oprit i se va anuna personalul de ntreinere pentru control i remediere. 15.) Se interzice conectarea echipamentelor de calcul la prize defecte sau fr legtur la pmnt. 16.) nlocuirea siguranelor la instalaiile electrice se va face numai de ctre personalul autorizat n acest scop. 17.) La utilizarea imprimantelor de mare vitez se vor evita supranclzirile care pot duce la incendii, n apropierea acestor imprimante se vor amplasa stingtoare cu praf i dioxid de carbon, n timpul funcionrii, capacul superior al imprimantelor va fi meninut nchis. Deschiderea capacului imprimantelor, pentru diverse reglaje se va realiza numai dup deconectarea acestora de la surs. 18.) La utilizarea imprimantelor se va evita atingerea prilor fierbini. Orice intervenie n timpul funcionrii imprimantelor, permis n documentaia tehnic, se va realiza cu luarea msurilor de evitare a antrenrii prilor corpului de ctre imprimant. 19.) n timpul funcionrii calculatorului, uile de acces la sala calculatorului nu se vor bloca sau ncuia, pentru a permite evacuarea rapid, n caz de pericol, a personalului de deservire. 20.) Se interzice fumatul n ncperile cu volum mare de documente. 21.) n cazul unui nceput de incendiu n sala calculatoarelor, se va aciona cu stingtorul cu praf i dioxid de carbon. Reluarea lucrului n zonele de aciune a dioxidului de carbon se va face numai dup ventilarea spaiilor respective cu instalaia de climatizare n funciune, n circuit deschis, un timp stabilit n funcie de capacitatea ventilatoarelor i volumul ncperilor, dar nu mai puin de o or. 22.) Se interzice consumul alimentelor pe masa suport a calculatorului sau deasupra tastaturii. 23.) n timpul lucrului la videoterminale, se va evita purtarea ochelarilor colorai. Pentru evitarea reflexiilor difuze sau speculare se vor utiliza filtre antireflexii (sub form de reea, aplicate pe suprafaa ecranului). 24.) Utilizatorii echipamentelor de calcul prevzute cu ecran de vizualizare trebuie s cunoasc necesitatea i posibilitile de reglare a echipamentului i mobilierului de lucru. Reglrile se vor efectua n raport cu cerinele sarcinii de munc, condiiile de mediu i cu caracteristicile antropofuncionale i psihofiziologice individuale. Se vor regla n principal: 1) luminana ecranului, contrastul ntre caractere i fond, poziia ecranului (nlime, orientare, nclinare); 2) nlimea i nclinarea suportului pentru documente; 3) nlimea mesei de lucru (dac este reglabil); 4) nlimea suprafeei de edere a scaunului, nclinarea i nlimea sptarului scaunului.
CAPITOLUL 2
2.1 Tiva C Series
Paii recomandate pentru utilizarea Kit Tiva C Series TM4C123G LaunchPad de evaluare sunt: 1 Urmai primul document README inclus n kit.README Primul document v va ajuta obine Tiva Seria C Launchpad sus i s fie difuzate n cteva minute. Vezi Tiva Seria C LaunchPad web Pagina de informaii suplimentare pentru a v ajuta s ncepei. 2 Experiment cu BoosterPacks Launchpad. O selecie de Tiva Seria C BoosterPacks i BoosterPacks compatibil MSP430 pot fi gsite pe pagina de web TI MCU LaunchPad. 3 facei primul pas spre dezvoltarea unei aplicatii cu Project 0 folosind ARM preferat instrument de lan i Biblioteca Tiva C Series TivaWare periferice Driver. Aplicatii software sunt ncrcate cu ajutorul de la bord pe In-Circuit Debug Interface (ICDI). A se vedea capitolul 3, dezvoltare de software, pentru procedura de programare.TivaWare pentru C Series periferice Software Library driver Manual de referin conine informaii specifice cu privire la structura software-ul i funcia. pentru mai multe informaii cu privire la proiect la 0, mergei la pagina de wiki Tiva C Series LaunchPad. 4 Personalizeaza si integrarea hardware-ul pentru a se potrivi o aplicaie capt. Acest manual de utilizare este un de referin important pentru a nelege funcionarea circuitului i completarea modificare hardware. De asemenea, putei vizualiza i descrca de aproape ase ore de material de instruire despre configurarea i utilizarea LaunchPad. Vizitai Tiva Seria C LaunchPad Workshop pentru mai multe informaii i tutoriale.
Asa arata schema cu controlerul care il voi folosi la proiect in calitate de controller . in schema data este prezentat si blocul de programare.
2.2 ADP-1853
CARACTERISTICI Gama de tensiune de intrare: 2,75 V la 20 V Gama de tensiune de ieire: 0,6 V la 90% VIN Curentul maxim de ieire mai mare de 25 A Arhitectura mod curent cu intrare curent sens Configurabil la modul de tensiune 1% precizie tensiunea de ieire peste temperatura De intrare de urmrire tensiune Frecven programabil: 200 kHz la 1,5 MHz de sincronizare Ieire ceas intern Modul de economisire a energiei la sarcin uoar Precizie permite de intrare Puterea bine cu pull-up rezistor intern Soft start ajustabil Programabile ctig sens curent Diode integrat bootstrap ncepe ntr-o sarcin prencrcat Compensarea pantei Extern reglabil Potrivit pentru orice condensator de ieire Supratensiune i supracurent-limit de protecie Protecia termic Tensiune minim de intrare de blocare (UVLO) Disponibil n 20-plumb, 4 mm 4 mm LFCSP Susinut de instrument de proiectare ADIsimPower
Eu am ales anume acest DC DC converter anume din cauza la faptul ca imi satisfice toate necesitatile necesare pentru schema mea de putere
Schema interna al controlerului TEORIA OPERARE ADP1853 este o frecven fix, pas-jos, controler de comutare sincron cu drivere integrate i bootstrapping pentru MOSFET externe de putere-N canal.Curent bucla de control modul poate fi configurat n modul de tensiune. Controlerul poate fi setat pentru a funciona n mod puls de economisire a energiei sri la o sarcin de lumin sau n PWM forat.ADP1853 include start programabil moale, ieire de protecie la supratensiune, limita de curent pro-grammable, putere bun, i funcii de urmrire.Controlerul poate funciona la o frecven de comutare ntre 200 kHz i 1,5 MHz, care este programat cu un rezistor sau sincronizat cu un ceas extern. De asemenea, are ceas din semnalul intern, care poate fi folosit pentru a sincroniza alte dispozitive.
CAPITOLUL 3
3.1 Calculul DCDC-convertor
OSCILLATOR FREQUENCY The internal oscillator frequency, which ranges from 200 kHz to 1.5 MHz, is set by an external resistor, RFREQ, at the FREQ pin. Some popular fOSC values are shown in Table 4, and a graphical relationship is shown in Figure 17. For instance, a 78.7 k resistor sets the oscillator frequency to 800 kHz. Furthermore, connecting FREQ to AGND or FREQ to VCCO sets the oscillator frequency to 300 kHz or 600 kHz, respectively. For other frequencies that are not listed in Table 4, the values of RFREQ and fOSC can be obtained from Figure 17, or use the following empirical formula to calculate these values: 065.1)kHz(568,96)k(=OSCFREQfR Table 4. Setting the Oscillator Frequency RFREQ fOSC (Typical) 332 k 200 kHz 78.7 k 800 kHz 60.4 k 1000 kHz 51 k 1200 kHz 40.2 k 1500 kHz FREQ to AGND 300 kHz FREQ to VCCO 600 kHz
INTERNAL LINEAR REGULATOR The internal linear regulator is a low dropout (LDO) VCCO. VCCO powers up the internal control circuitry and provides power for the gate drivers. It is guaranteed to have more than 200 mA of output current capability, which is sufficient to handle the gate driver requirements of typical logic threshold MOSFETs driven at up to 1.5 MHz. VCCO is always active and cannot be shut down by the EN signal; however, the over-temperature protection event disables the LDO together with the controller. Bypass VCCO to AGND with a 1 F or greater capacitor. Because the LDO supplies the gate driver current, the output of VCCO is subject to sharp transient currents as the drivers switch and the boost capacitors recharge during each switching cycle. The LDO has been optimized to handle these transients without overload faults. Due to the gate drive loading, using the VCCO output for other external auxiliary system loads is not recommended. The LDO includes a current limit that is well above the expected maximum gate driver load. This current limit also includes a short-circuit foldback to further limit the VCCO current in the event of a short-circuit fault. For an input voltage of less than 5.5 V, it is recommended to bypass the LDO by connecting VIN to VCCO, as shown in Figure 20, thus eliminating the dropout voltage. However, if the input range is 4 V to 7 V, the LDO cannot be bypassed by shorting VIN to VCCO because the 7 V input has exceeded the maximum voltage rating of the VCCO pin. In this case, use the LDO to drive the internal drivers, but keep in mind that there is a dropout when VIN is less than 5 V.
POWER GOOD The PGOOD pin is an open-drain NMOSFET with an internal 12.5 k pull-up resistor connected between PGOOD and VCCO. PGOOD is internally pulled up to VCCO during normal operation and is active low when tripped. When the feedback voltage, VFB, rises above the overvoltage threshold or drops below the undervoltage threshold, the PGOOD output is pulled to ground after a delay of 12 s. The overvoltage or undervoltage condition must exist for more than 10 s for PGOOD to become active. The PGOOD output also becomes active if a thermal overload condition is detected. CH1 10VM2msA CH111.2V134CH3 500mVCH4 10ASWSSINDUCTORCURRENT10594-028 ENABLE/DISABLE CONTROL The EN pin is used to enable or disable the controller ADP1853; the precision enable typical threshold is 0.63 V. When the voltage at EN rises above the threshold voltage, the controller is enabled and starts normal operation after initialization of the internal oscillator, references, settings, and the soft start period. When the voltage at EN drops to typically 30 mV (hysteresis) below the threshold voltage, the driver and the internal controller circuits in the ADP1853 are turned off. The initial settings are still valid; therefore re-enabling the controller does not change the settings until the power at the VIN pin is cycled. In addition, the EN signal does not shut down the LDO at VCCO, which is always active when VIN is above the UVLO threshold. For the purpose of start-up power sequencing, the startup of the ADP1853 can be programmed by connecting an appropriate resistor divider from the master power supply to the EN pin, as shown in Figure 23. For instance, if the desired start-up voltage from the master power supply is 10 V, R1 and R2 can be set to 156 k and 10 k, respectively.
APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL The ADP1853 is supported by the ADIsimPower design tool set. ADIsimPower is a collection of tools that produce complete power designs optimized to a specific design goal. The tools allow the user to generate a full schematic, bill of materials, and calculate performance in minutes. ADIsimPower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the IC and all real external components. The ADIsimPower tool can be found at www.analog.com/ADIsimPower and the user can request an unpopulated board through the tool. SETTING THE OUTPUT VOLTAGE The output voltage is set using a resistive voltage divider from the output to FB. For RBOT, use a 1 k to 20 k resistor. Choose RTOP to set the output voltage by using the following equation: where: RTOP is the high-side voltage divider resistance. RBOT is the low-side voltage divider resistance. VOUT is the regulated output voltage. VFB is the feedback regulation threshold, 0.6 V. SOFT START The soft start period is set by an external capacitor between SS and AGND. The soft start function limits the input inrush current and prevents output overshoot. When EN is enabled, a current source of 6.5 A starts charging the capacitor, and the regulation voltage is reached when the voltage at SS reaches 0.6 V. The soft start time is approximated by The soft start time is approximated by SSSSCtA5.6V6.0= The SS pin reaches a final voltage equal to VCCO. When a controller is disabled, for instance, if EN is pulled low or experiences an overcurrent limit condition, the soft start capacitor is discharged through an internal 3 k pull-down resistor.
INPUT CAPACITOR SELECTION Use two parallel capacitors placed close to the drain of the high-side switch MOSFET (one bulk capacitor of sufficiently high current rating and a 10 F ceramic decoupling capacitor). Select an input bulk capacitor based on its ripple current rating. The minimum input capacitance required for a particular load is SWESROPPOMININfDRIVDDIC)()1(,= where: IO is the output current. D is the duty cycle. VPP is the desired input ripple voltage. RESR is the equivalent series resistance of the capacitors.
OUTPUT CAPACITOR SELECTION For maximum allowed switching ripple at the output, choose an output capacitor that is larger than ))4((182222ESLSWESRLOUTSWLOUTLfRIVfIC where: VOUT is the target maximum output ripple voltage. IL is the inductor ripple current. RESR is the equivalent series resistance of the output capacitor (or the parallel combination of ESR of all output capacitors). LESL is the equivalent series inductance of the output capacitor (or the parallel combination of ESL of all capacitors). The impedance of the output capacitor at the switching frequency multiplied by the ripple current gives the output voltage ripple. The impedance is made up of the capacitive impedance plus the nonideal parasitic characteristics, the equivalent series resistance (ESR), and the equivalent series inductance (ESL). Usually the capacitor impedance is dominated by ESR. The maximum ESR rating of the capacitor, such as in electrolytic or polymer capacitors, is provided in the manufacturers data sheet; therefore, the output ripple reduces to ESRLOUTRIV Electrolytic capacitors also have
MOSFET SELECTION The choice of MOSFET directly affects the dc-to-dc converter performance. A MOSFET with low on resistance reduces I2R losses, and low gate charge reduces transition losses. The MOSFET should have low thermal resistance to ensure that the power dissipated in the MOSFET does not result in excessive MOSFET die temperature. The high-side MOSFET carries the load current during on time and usually carries most of the transition losses of the converter. Typically, the lower the on resistance of the MOSFET, the higher the gate charge and vice versa. Therefore, it is important to choose a high-side MOSFET that balances the two losses. The conduction loss of the high-side MOSFET is determined by the equation DSONRMSLOADCRIP=2)()( where: RDSON is the MOSFET on resistance. The gate charging loss is approximated by the equation SWGPVGfQVP where: VPV is the gate driver supply voltage. QG is the MOSFET total gate charge. Note that the gate charging power loss is not dissipated in the MOSFET but rather in the ADP1853 internal drivers. This power loss should be taken into consideration when calculating the overall power efficiency. The high-side MOSFET transition loss is approximated by the equation SWFRLOADINTfttIVP+ where: PT is the high-side MOSFET switching loss power. tR is the rise time in charging the high-side MOSFET. tF is the fall time in discharging the high-side MOSFET. tR and tF can be estimated by RISEDRIVERGSWRIQt_ FALLDRIVERGSWFIQt_ where: QGSW is the gate charge of the MOSFET during switching and is given in the MOSFET data sheet. IDRIVER_RISE and IDRIVER_FALL are the driver current output from the ADP1853 internal gate drivers.
If QGSW is not given in the data sheet, it can be approximated by 2GSGDGSWQQQ+ where: QGD and QGS are the gate-to-drain and gate-to-source charges given in the MOSFET data sheet. IDRIVER_RISE and IDRIVER_FALL can be estimated by GATESOURCEONSPDDRISEDRIVERRRVVI+__ GATESINKONSPFALLDRIVERRRVI+__ where: VDD is the input supply voltage to the driver and is between 2.75 V and 5 V, depending on the input voltage. VSP is the switching point where the MOSFET fully conducts; this voltage can be estimated by inspecting the gate charge graph given in the MOSFET data sheet. RON_SOURCE is the on resistance of the ADP1853 internal driver, given in Table 1, when charging the MOSFET. RON_SINK is the on resistance of the ADP1853 internal driver, given in Table 1, when discharging the MOSFET. RGATE is the on gate resistance of MOSFET given in the MOSFET data sheet. If an external gate resistor is added, add this external resistance to RGATE. The total power dissipation of the high-side MOSFET is the sum of conduction and transition losses: TCHSPPP+ The synchronous rectifier, or low-side MOSFET, carries the inductor current when the high-side MOSFET is off. The low-side MOSFET transition loss is small and can be neglected in the calculation. For high input voltage and low output voltage, the low-side MOSFET carries the current most of the time. Therefore, to achieve high efficiency, it is critical to optimize the low- side MOSFET for low on resistance. In cases where the power loss exceeds the MOSFET rating or lower resistance is required than is available in a single MOSFET, connect multiple low-side MOSFETs in parallel. The equation for low-side MOSFET conduction power loss is DSONRMSLOADCLSRIP There is also additional power loss during the time, known as dead time, between the turn-off of the high-side switch and the turn-on of the low-side switch, when the body diode of the low-side MOSFET conducts the output current. The power loss in the body diode is given by OSWDFBODYDIODEIftVP= where: VF is the forward voltage drop of the body diode, typically 0.7 V. tD is the dead time in the ADP1853, typically 30 ns when driving a medium size MOSFETs with input capacitance, Ciss, of approximately 3 nF. The dead time is not fixed. Its effective value varies with gate drive resistance and Ciss; therefore, PBODYDIODE increases in high load current designs and low voltage designs. Then the power loss in the low-side MOSFET is BODYDIODECLSLSPPP+= Note that MOSFET on resistance, RDSON, increases with increasing temperature with a typical temperature coefficient of 0.4%/oC. The MOSFET junction temperature (TJ) rise over the ambient temperature is TJ = TA + JA PD where: JA is the thermal resistance of the MOSFET package. TA is the ambient temperature. PD is the total power dissipated in the MOSFET. LOOP COMPENSATIONVOLTAGE MODE Set the controller to voltage mode operation by placing a 100 k resistor between DL and PGND. Chose the larger possible ramp amplitude for the voltage mode below 1.5 V. The ramp voltage is programmed by a resistor value between VIN and the RAMP pin: RAMPSWINRAMPVfVR=pF100V2.0 The voltage at the RAMP pin is fixed at 0.2 V, and the current going into RAMP should be between 10 A and 160 A. Make sure that the following condition is satisfied: (1) A160V2.0A10RAMPINRV For instance, with an input voltage of 12 V, RRAMP should not be less than 73.8 k. Assuming that the LC filter design is complete, the feedback control system can be compensated. In general, aluminum electrolytic capacitors have high ESR; however, if several aluminum electrolytic capacitors are connected in parallel and produce a low effective ESR, then Type III compensation is needed. In addition, ceramic capacitors have very low ESR (only a few milliohms) making Type III compensation a better choice.
Type I I I Compensation Figure 27. Type III Compensation If the output capacitor ESR zero frequency is greater than of the crossover frequency, use the Type III compensator as shown in Figure 27. Calculate the output LC filter resonant frequency as follows: (2) LCfLC21= Chose a crossover frequency that is 1/10 of the switching frequency: (3) 10SWCOff= Set the poles and zeros as follows: (4) SWP2P1fff21== (5) IZSWCOZ2Z1CRffff21404==== or (6) IZLCZ2Z1CRfff212=== Use the lower zero frequency from Equation 5 or Equation 6. Calculate the compensator resistor, RZ, as follows: (7) 2LCINCOZ1RAMPTOPZfVffVRR= Next, calculate CI: (8) Z1ZIfRC=21 Because of the finite output current drive of the error amplifier, CI needs to be less than 10 nF. If it is larger than 10 nF, choose a larger RTOP and recalculate RZ and CI until CI is less than 10 nF. Because CHF << CI, calculate CHF as follows: (9) ZSWHFRfC=1 Next, calculate the feedforward capacitor, CFF, assuming RFF << RTOP: (10) SWFFFFfCR=1 Check that the calculated component values are reasonable. For instance, capacitors smaller than about 10 pF should be avoided. In addition, RZ values less than 3 k and CI values greater than 10 nF should be avoided. If necessary, recalculate the compensation network with a different starting value for RTOP. If RZ is too small or CI is too big, start with a larger value for RTOP. This compensation technique should yield a good working solution. When precise compensation is needed, use the ADIsimPower design tool. LOOP COMPENSATIONCURRENT MODE Compensate the ADP1853 error voltage loop in current mode using Type II compensation. Setting the Slope Compensation In a current-mode control topology, slope compensation is needed to prevent subharmonic oscillations in the inductor current and to maintain a stable output. The external slope compensation is implemented by summing the amplified sense signal and a scaled voltage at the RAMP pin. To set the effective slope compensation, connect a resistor (RRAMP) between the RAMP pin and the input voltage (VIN). RRAMP is calculated by CSCSRAMPRALR=6107 where: L is the inductor value measured in H. RCS (m) is resistance of the current sense element between CS and PGND (for instance, RDSON_MAX is the low-side MOSFET maximum on resistance). ACS is the current sense amplifier gain and is 3 V/V, 6 V/V, or 12 V/V. Thus, the voltage ramp amplitude, VRAMP, is: RAMPSWINRAMPRfVV=pF100V2.0 where 100 pF is the effective capacitance of the internal ramp capacitor, CRAMP, with 4% tolerance over the temperature and VIN range. Setting the Current Sense Gain The voltage drop across the external low-side MOSFET is sensed by a current sense amplifier by multiplying the peak inductor current and the RDSON of the MOSFET. The result is then amplified by a gain factor of 3 V/V, 6 V/V, or 12 V/V, which is programmable by an external resistor, RCSG, connected to the DL pin. This gain is sensed only during power-up and not during normal operation. The amplified voltage is summed with the slope compensation ramp voltage and fed into the PWM controller for a stable regulation voltage. The voltage range of the internal node, VCS, is between 0.4 V and 2.2 V. Select the current sense gain such that the internal minimum amplified voltage (VCSMIN) is above 0.4 V and the maximum amplified voltage (VCSMAX) is 2.1 V. Note that VCSMIN or VCSMAX is not the same as VCOMP, which has a range of 0.85 V to 2.2 V. Make sure that the maximum VCOMP (VCOMPMAX) does not exceed 2.2 V to account for temperature and part-to-part variations. See the following equations for VCSMIN, VCSMAX, and VCOMPMAX:
SWITCHING NOISE AND OVERSHOOT REDUCTION To reduce voltage ringing and noise, it is recommended to add an RC snubber between SW and PGND for high current applications, as illustrated in Figure 30. In most applications, RSNUB is typically 2 to 4 , and CSNUB is typically 1.2 nF to 3 nF. The size of the RC snubber components must be chosen correctly to handle the power dissipation. The power dissipated in RSNUB is SWSNUBINSNUBfCVP=2 In most applications, a component size of 0805 for RSNUB is sufficient. The RC snubber does not reduce the voltage over-shoot. A resistor, shown as RRISE in Figure 30, at the BST pin helps to reduce overshoot and is generally between 2 and 4 . Adding a resistor in series, typically between 2 and 4 , with the gate driver also helps to reduce overshoot. If a gate resistor is added, then RRISE is not needed.
Concluzii
In urma acestei lucrari de practice am acumlat cele mai multe cunostinte in domeniul electronicii si proiectarii sistemelor emmbeddet . La aceasta practica am efectuat o schema de putere de control al ecranului din leduri RGB . Am optinul cunostinte practice in lucrul cu DC DC controlere si colculul tranzistorilor de putere mosfet. In ruma proectarii am opservat care sunt pasii de proiectare si cum se face o priectare correct si care pasi de proiectare.